PDB and ADC channel

[fanziyu]

MCU :S32K144

1 It looks like there is some relationship about the number 4 in the picture

2.In 32K-RM 43.7 ADC Trigger Sources "each PDB channel will have up to 8 pre-triggers for  ADC channel control,which provides an automatically trigger scheme so that  the CPU involvement  is not necessary"

Problem:Are the following left and right corresponding one by one?

PDB0->CH[0].DLY[0]         ADC0->SC1[0]

...

PDB0->CH[0].DLY[7]         ADC0->SC1[7]

PDB0->CH[1].DLY[0]         ADC0->SC1[8]

...

PDB0->CH[1].DLY[7]         ADC0->SC1[15]

[_Leo_ · Accepted solution]

Hi,

Thank you so much for your interest in our products and for using our community.

Personally it makes sense to me that it corresponds one by one. But I didn't find anything in the available documentation to confirm it. Can you try it or give me more detail on what you are trying to do please?

Have a nice day!

[fanziyu]

Any official documents or authoritative answers will reassure me and make my product design more reliable.