Not able to read the adc result

[sarwath]

Hello Community,

I am facing issue with reading the adc0 result.

• ADC0 peripheral clock is 48Mhz
• ADC0->SC1[0] = ADC_SC1_ADCH(5); 
• Conversion is not started.

In debug mode, from console tab I got one warning. Failed to read the memory. Then I cross verified with the address 0x4003b000 which is belongs to ADC0.

I'm using the Segger debugger right now, and all the necessary parameters are set for adc0 and pdb0. However, the adc0 conversion is not starting for some reason. Could someone kindly assist me with this? My project zip is provided.

Thanks in advance,

Sarwath

[Senlent]

Hi@sarwath

I made a routine for your reference, note that I changed the ADC channel.

[sarwath]

Hi @Senlent ,

I compared your reference code with my code, and they both appear to be similar. Today, I set breakpoints at all levels and verified that the clock settings for both the ADC and the PDB were correct. All of the other settings are also satisfactory. But I'm not sure why the ADC conversion isn't starting. 

B.R,

Sarwath

[Senlent]

I can't help you check your code one by one, I also know that the configuration is the same, but I tested the project I sent you, it is working normally, I think it may be the configuration of your clock, I suggest you use I send you the project, and then modify it according to your ideas.

[sarwath]

Hello @Senlent ,

I'll make changes to your project and test my ADC outputs. I've already started one thread for the clock.

https://community.nxp.com/t5/S32K/32K144-clock-configuration/m-p/1573486#M19605.

Could you please look into the above-mentioned thread and assist me in setting the system clock to 80 MHz without SPLL?

B.R,

Sarwath

[Senlent · Accepted solution]

Hi@sarwath

If you disable SPLL_CLK, you can't set SYS_CLK to 80MHz!

Solution:

     you must change the external crystal oscillator to 16MHz or higher frequency crystal oscillator

otherwise you cannot set the SYS_CLK to 80MHz.

so please change your hardware crystal to 16MHz then try again.,

just for your reference, set the SOSC_CLK to 16MHz, 

[sarwath]

Hi @Senlent ,

Thanks for your response.

Now I know how to operate my MCU at 80MHz.

By default, the system clock source is set to the FIRC (48MHz), and also my ADC's functional clock is 48MHz.

I changed the input analogue voltage (ADC_INPUTCHAN_EXT4) and got data from the ADC (RA). However, I am unable to understand why the adc result for voltages below 1.5 volts is 0, while the adc result for voltages over 1.5 volts is 4095. I'm getting only 0 or 4095 as my ADC output. My analogue voltage range is (0 to 3.3 v).

Thanks in advance,

Sarwath

[Senlent]

I don't have a 16MHz external crystal, so I can't help you reproduce the problem.
You first need to make sure that this demo can work normally under your original clock configuration. If the problem still occurs in the clock configuration, you can try to reduce the module clock of the ADC.
The clock of the ADC is limited by the upper limit. If it is too high, it will indeed cause sampling errors.