How does S32K148 LPI2C master support clock stretching feature?

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How does S32K148 LPI2C master support clock stretching feature?

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Yanzhong
Contributor I

We want to use S32K148 LPI2C to config ADI A2B network, which needs the I2C master to support clock stretching feature. How does S32K148 LPI2C master support clock stretching feature?

 

Thanks,

Yanzhong Wang

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Yanzhong
Contributor I

Thanks.

The reset value of register MCFGR3 is zero, so the clock stretching is disabled by default. Is it right?

 

BR,

Yanzhong

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danielmartynek
NXP TechSupport
NXP TechSupport

No, if set to 0, the timeout feature is disabled, but not the clock stretching:

danielmartynek_0-1678786074279.png

It can be also enabled on SDA in MCFGR1[TIMECFG].

danielmartynek_1-1678786161697.png

 

Regards,

Daniel

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Yanzhong
Contributor I

You mean the Pin Low Timeout feature can be used to confirm whether clock stretching is generated?

BR,

Yanzhong

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Yanzhong,

No, the clock stretching is functional by default.

But you can limit the time this way.

 

BR, Daniel

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Yanzhong
Contributor I

The Pin Low Timeout feature is disabled by default. So,  the time of clock stretching is unlimited, isn't it?

 

Br,

Yanzhong

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danielmartynek
NXP TechSupport
NXP TechSupport

yes, that is correct.

 

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Yanzhong
Contributor I

Thanks a lot!

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Yanzhong,

In the master mode, the clock stretching is always enabled.

It follows the I2C specification (UM10204).

In the MCFGR3 register, timeout can be set.

 

BR, Daniel

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Yanzhong
Contributor I

Thanks a lot!

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