CMU_FC destructive reset configuration

[FabioG]

Hi There,

1) I looking for configuring CMU_FC peripheral (Chapter 54). Revision 8 of reference manual.

There no explicit reference (I don't find it ...) about setting destructive reset, but in logic network at Chapter 24, par 8 "Clock Monitoring, page 960 "Figure 115. Frequency checking (FC) instances"  seems that to enable destructive reset we have to enable asyncronous interrupts FHHAIE and FLLAIE as shown for FC4,5,3 is it true ?

2)And why for fc0 and Fc6, in order  to enable destructive reset is activated FHHIE (Syncronous Upper threshold!! ) on the LOWER threshold path , and  for the interrupt activation   is set FLLAIE (Lower Asyncronous)for the  UPPER threshold path  ? is it a mistake or a feature ? (see attached file)

2) in revision 5 of manual there was not present FC6 (CM7_CORE_CLK). what is the difference with FC3(CORE_CLK) ?

Best Regards

Fabio

[danielmartynek]

Hi @FabioG,

1.

This is under an internal discussion at the moment.

2.

FC_6 is available on S32K388 only.

Regards,

Daniel

[FabioG]

Regarding point 1: in order to checkCMU_FC  Distructive reset, what I need to configure in CMU_FC?

Best Regards,

Fabio

[danielmartynek]

Hi @FabioG,

Based on the latest update, the diagrams should be fixed in the next RM release.

Both FLL and FHH can generate either an interrupt or reset. The destructive reset is bond with the asynchronous mode, and the synchronous mode only generate the interrupt.

Regards,

Daniel