That doesn't seem to match other documentation.
Here’s what I found out from Secure File (PR552207):
− All 4 MACs can be used in parallel
− Max of 3X RGMII/RMII/MII* interfaces (mux options available for all MACs)
− Max of 4X SGMII interfaces (PFE_MAC0/1/2, GMAC)
The product page also hints that you have up to 4 Ethernet ports and does not mention any cautions or footnotes that there are limitations to the number of ports that are available simultaneously. After all, what's the point of having 4 ports if you can only use 2?
The IO Mux spreadsheet is really confusing to me. The screenshot you captured here to me looks like it describes which power rails are connected to which pins. If I go to the actual IO pins in that file it's a total mess. Pins options show up with missing or conflicting information and there's no way to look up all the pins needed for a type of port, you have to go pin by pin and make sure you got them all. So if I want to see what pins I'll need for GMAC0 for RGMII, for example, I have to look for all the pins manually by looking at the IO Mux spreadsheet and the user manual at the same time. The pin config feature in Design Studio 32 looks like it might be easier to use, so I'm trying to get that working.
Can you please confirm which documentation is correct? What's a good way to see how the pins are muxed?