SPI slave mode Receiving issue

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SPI slave mode Receiving issue

1,124件の閲覧回数
1216502530
Contributor I

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Dear all:

Enable interrupt mode, is it normal for interrupt to enter here?

Only after multiple runs can the data sent by the host be received completely correctly.

The main machine adopts lpc1769.

What's the reason, please?

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

In your case, the FIFO underrun error was detected. That is why the transfer is aborted such as is recommended in the S32K RM rev12.1

pastedImage_1.png

At first, you can try to reduce the master SPI clock.

If I understand well your slave device is S32K116 and the master device is lpc1769, right?

Best regards,

Diana

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1216502530
Contributor I

Hello Diana,

      First of all, I'm glad you could get back to me.You understand right, S32K116 is the slave, LPC1769 is the host.

I have reduced the SPI clock of the host computer(Clock reduced from 500000 to 100000). The transmission will still overflow and interrupt. Occasionally, the data will be misplaced. I don't know if it is caused by this reason.

Is there any other solution,please?

Thank you very much.

   li

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hello Li,

Have you tried to increase the slave buffer size?

You can try to consider to use DMA instead of using interrupts. An example lpspi_dma_slave_s32k116 is in the S32DS.

What source clock do you have selected for the LPSPI slave?

Best regards,

Diana

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