[S32K148] how to receive multiple CAN ids from one MailBox.

[HyungGyuKim76]

Hi all,

As a test, Receiving two IDs(100, 101) normally with the code below.

#define RX_MAILBOX_0 0x0
#define RX_MAILBOX_1 0x1
#define RX_MSG_ID_0 (100UL)
#define RX_MSG_ID_1 (101UL)

int main(void)
{

................................................

/* Initialize Can0 */
CAN_Init(&can_pal1_instance, &can_pal1_Config0);

/* Configure RX buffer with index RX_MAILBOX */
CAN_ConfigRxBuff(&can_pal1_instance, RX_MAILBOX_0, &buffCfg, RX_MSG_ID_0);
CAN_ConfigRxBuff(&can_pal1_instance, RX_MAILBOX_1, &buffCfg, RX_MSG_ID_1); 
CAN_ConfigTxBuff(&can_pal1_instance, TX_MAILBOX_0, &buffCfg);
CAN_ConfigTxBuff(&can_pal1_instance, TX_MAILBOX_1, &buffCfg);

while(1)

{

memset(&recvMsg0, 0, sizeof(can_message_t));

CAN_Receive(&can_pal1_instance, RX_MAILBOX_0, &recvMsg0);
if(recvMsg0.data[0] != 0)
{uartPrintf(&uartStateTX, "CAN id : %x [0] : %d \r\n", recvMsg0.id, recvMsg0.data[0]);}

memset(&recvMsg1, 0, sizeof(can_message_t));
CAN_Receive(&can_pal1_instance, RX_MAILBOX_1, &recvMsg1);
if(recvMsg1.data[0] != 0)
{uartPrintf(&uartStateTX, "CAN id : %x [0] : %d [1] : %d \r\n", recvMsg1.id, recvMsg1.data[0]);}

}

}

But if I want to receive IDs from 100 to 200, do I have to receive 100 mailboxes?

Can you please tell me how to receive in one MailBox?

Please let me know if you have a simple example.

[HyungGyuKim76]

thank you.
I was able to get all the ids very simply by adding a single line as shown below.

FLEXCAN_DRV_SetRxMbGlobalMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, 0); // All id received masking

[Dileep1441]

Hi @HyungGyuKim76 

I'm facing the Same issue and trying to receive multiple CAN Messages, Can you please share your code.

and what are the settings need to change for this functionality.

Thanks in Advance.

[akhilranga]

Hi there,

Can you please share the code with me. I just have the similar requirement. So, if you can share the code where you were able to get all the CAN ID's. 

[PetrS · Accepted solution]

Hi, 

you can config mask register and create some ID range to be received into given MB.
For example by clearing mask register (global or individual, depends what scheme you are using) you can receive all std. or ext. IDs into single MB.
Cleared bit in mask indicates corresponding received ID bit is don't care, otherwise it is compared with corresponding bit in ID in prepared MB.
For sure you cannot create any possible ID ranges, like your 100-200.

BR, Petr