Hello all,
I was wondering if there was a way to test my SPI without any slave modules.
I simply want to initialize SPI correctly, write data to SPIDR, and copy the same data to a variable.
I have the following variables
volatile byte temp = 0;
volatile byte temp0 = 0;
volatile byte temp2 = 0;
//Port M
DDRM_DDRM5 = 1; // SCK on PM5 set to output
DDRM_DDRM4 = 1; // MOSI on PM4 set to output
DDRM_DDRM3 = 1; // SS on PM3 set to output
DDRM_DDRM2 = 0; // MISO on PM2 set to input
/* SPI SET UP */
SPICR1 = 0x50; /* MSB first, manual slave select, 0 phase, 0 polarity clock, Master mode, no interrupts on trasmit, enable SPI, no interrupts */
SPICR2 = 0x00; /* Normal uni directional mode */
SPIBR = 0x57; /* Baud rate = Bus Clock / Baud Rate Division; Check divisor table in SPI section pg 463. Diving by 2048 to try to slow it down to see data on O-scope*/
// SEND DATA
while ( (SPISR & 0x20) == 0) { /* wait for SPTEF = 1 to know SPIDR is empty */ }
temp = SPIDR = temp0 = 100;
while ( (SPISR & 0x80) == 0) { /* wait for SPIF = 1 to know new data has copied */ }
temp2 = SPIDR;
The end result is that temp0 is 100 or 'A'
and temp is 0, which I expected since SPIDR should be initially empty
But temp2 is 255 (I am guessing unsigned 11111111 )
I figured temp2 should be 100 or 'A'
Is my understanding incorrect?
Any info on SPI would help. I am using a NanoCore with the Motorola 9S12.
Thanks all
Hello,
The SPIDR register does not behave like a normal read-write register. Writing to the register initiates a send from the master (via MOSI). Then reading the same location gives the value just returned (via MISO). If the input pin is open circuit (with a pull-up present) the expected return would be 0xFF.
For the purpose of the test, you might try connecting the MOSI pin to the MISO pin.
The port M initialisation might set the relevant pins to inputs, with pull-ups enabled for when the SPI module is disabled. The SPI module will determine the direction when it is enabled.
Regards,
Mac