Hi
I found a problem during debugging。The PS2 pin of s912zvml64 cannot be output
I use the following settings
DDRS_DDRS2 = 1;
DDRS_DDRS3 = 1;
DDRS_DDRS4 = 1;
PS3,PS4 Can output normally,But,PS2,The output is always out of control, and I / O seems to be in the input state all the time
When I set these three I / O to the input mode, the function of reading Hall signal is normal. In another project, I use these three I / O for output. As a result, only PS3 and PS4 can be controlled. It's really strange
解決済! 解決策の投稿を見る。
Hi,
Possible issues:
1) There is something connected to the pin externally what influences value at the pin
2) There is alternative function enabled and routed to the pin. For example RxD of the SCI. If alternative function(s) is enabled at the pin ten the function with highest priority takes precedence and controls the pin.
3) Somewhere in you SW you accidentaly change the direction of the pin.
4) The pin is destroyed (check behavior with simplified SW on another board)
Best regards,.
Ladislav
Hi,
Possible issues:
1) There is something connected to the pin externally what influences value at the pin
2) There is alternative function enabled and routed to the pin. For example RxD of the SCI. If alternative function(s) is enabled at the pin ten the function with highest priority takes precedence and controls the pin.
3) Somewhere in you SW you accidentaly change the direction of the pin.
4) The pin is destroyed (check behavior with simplified SW on another board)
Best regards,.
Ladislav
Hi,
DDRS_DDRS2 = 1; // Set PS2 as Output
for(;;)
{
PTS_PTS2 = 1; // Set PS2 to High
Cpu_Delay100US(5000); // Delay 500ms
PTS_PTS2 = 0; // Set PS2 to Low
Cpu_Delay100US(5000); // Delay 500ms
}
Best Regards,
Aaron
As you said, PS2, PS3 and PS4 are configured in this way, but PS2 cannot be controlled, while PS3 and PS4 are normal