Startup issue on Power on Reset

[tushargupta_1]

I am working on S12ZVMC. While in debug mode everything seems to work OK. But as soon as a Power on Reset is provided the MCU stops responding. Even a simple I/O toggle placed at the very start of main does not work. Any clues in this regard would be very helpful.Radek Sestak

[RadekS]

Hi Tushar,

Do you use evaluation boar or your own? If you use your own, please send me schematic for a short review.

Did you disconnect BDM interface when you reset/restart MCU? The BDM interface (debugger) may try reconnecting to MCU. Since BKGD pin’s voltage level is tested during reset, it may lead to reset into the special mode where MCU waits for BDM commands.

What means “at the very start of main”? Is there any code prior that simple I/O toggle commands (for example for clock configuration)? The clock configuration code may contain loop for waiting on PLL LOCK status. Incorrect clock parameters may lead to the situation where PLL cannot lock at target frequency = endless loop.

Do you use bare metal CW project or you use any initialization tool like ProcessorExpert?

The typical issue when code works in special mode (during debugging) and it does not work in normal mode is in writing into specific registers (or specific bits) which cannot be written in normal mode (like TCNT) or could be written just once (like MODRRx, ECLKCTL, CPMUCOP, CPMUVREGCTL,..).

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[tushargupta_1]

Hi Radek,

We are using our own board.Schematic is attached.

Disconnecting BDM does not have any effect on the response of the system.

very start means just setting the port pin as IO and writing 1 to data register without going into the clock configuration or any other peripheral initialization.

we use bare metal project and dont write any of the protected bits.

we are really stuck and hoping for a quick resolution.

[RadekS · Accepted solution]

Hi Tushar,

Thank you for more details.

Currently, I do not see any obvious issue in your schematic except one point:

I am slightly confused from your power supply. The VDDA, VDDX1 and VDDX2 pins are connected to signal +5V signal, while BKGD and RESET pins have pull-ups to signal Vddx. The signal Vddx is also used as input for LM4128BQ1MF2.5 reference. But I didn’t found any connection between +5V and Vddx signals.

This may by a reason why it works only with the debugger. The connected debugger provide strong pull-ups between Bkgd/Rst signals and +5V. I suppose that LM4128BQ1MF2.5 input impedance may tight Rst/Bkgd pins to GND and this way keep MCU in the reset state.

Please try applying a wire patch between +5V and Vddx signals.

Just note: The S12ZVM have internal 5k pull-up at RESET pin. Therefore, you may save some negligible cents when you do not populate R33.

I hope it helps you.

Have a great day,
RadekS

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[tushargupta_1]

Hi Radek,

Thank you so much for your great suggestions. By applying a wire patch between 5 V and Vddx the problem is solved and MCU is working when the power on reset. Thank you so much for your support.

Regards,

Tushar

[RadekS]

Hi Tushar,

You're welcome.

I am glad that the problem has been resolved.

I wish you good luck in the future development.

Have a great day,
RadekS