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Posted: Mon Nov 14, 2005 11:58 am
am I right in thinking that only 8 interrupts in a row can be routet to the xgate? I think that this is not clearly verbalised in the documentation for the Controller. If I'm wrong, how can the Interrupts (for example ATD0, PortH and SCI2) be routed to the XGATE?
Posted: Mon Nov 14, 2005 1:22 pm
Hi, To route any interrupt to the XGate, you just need to set the matching RQST bit of this interrupt. You're then free to generate any CPU interrupt when you're finished with the XGate Interrupt treatment.
maybe the confusion arises because you can only view 8 interrupt setup channels at a time. There are multiple banks of 8 registers, so you select the correct page before modifying the register - see Alban's code as an example The app note AN3144 has some explanations and worked examples of this
Posted: Tue Nov 15, 2005 7:46 am
thanks for your replies. In fact, my problem was I didn't realize that the Interrupt Configuration Data Registers were banked. Now I understand the system.