Hello Team,
I am using MC9S12ZVML128_BLDC_Sensorless sample code for reference.
As per my understanding, the delays filled in the PTU trigger list are in terms of bus clock cycle.
Please confirm the understanding is correct or not.
As per datasheet, in 1.13.3.1 Motor Control Loop Overview point below note is given,
NOTE
In the PTU there is time window after the reload event assertion before the
first trigger is permitted. This time can be up to 10 bus cycles.
Subsequent triggers also require a load time of 6 bus clock cycles (one
trigger generator enabled) or 10 bus clock cycles (both trigger generators
enabled). This defines the minimal spacing between triggers without
causing a PTU trigger generator timing error.
In the ADC there is 10 bus cycle maximum time window after the reload
event assertion to access the first ADC command from the list. In this
window the ADC conversion can not be started. If the measurement is
control loop related these delays are negligible due to much larger delays in
the PWM-GDU-feedback loop.
As per above note, the first trigger should be set as >=10 bus clock cycle.
In sample code, the minimum first trigger is MIN_ADC_TRIGGER_FIRST = 8, for fBUS=12.5MHz
As per my understanding, MIN_ADC_TRIGGER_FIRST should be >=10 bus clock
Please confirm the understanding.
But the SW behaviour is ok with the MIN_ADC_TRIGGER_FIRST = 8.
So, i want to know the reason , how SW is working correctly even if the MIN_ADC_TRIGGER_FIRST is not as per the datasheet.
Request you to share the answers of above points.
Thanks in advance.
