Hello,
I'm working with analogic to digital conversion in the MC9S12XET256, but the ATD module is returning strange values. If the signal voltage is less than 2.5V the ATD returns 0, and when the signal is higher than 4.0V it returns 1023 (in 10Bits resolution mode).
But the most curious happens when the signal is between 2.5V and 4.0V. The AD conversion becomes very instable and returns only values with gaps of 64, 32 or 16, depending of voltage level. Below are the values that I got: In the left column are the results that I got from AD conversion (resolution of 10Bits), and in the right column the differences between the left value and the one just below. The conversion never returns values between the ones specified below, like 978, 678 or 115.
1023 63
960 64
896 64
832 64
768 64
704 64
640 64
576 64
512 64
448 64
384 64
320 64
256 32
224 32
192 32
160 32
128 16
112 16
96
The code is:
ATD configuration registers set as:
ATD0CTL1 = ATD0CTL1_SRES0_MASK; // Resolution of 10Bits
ATD0CTL2 = ATD0CTL2_ASCIE_MASK; // Interrupt enabled
ATD0CTL3 = ATD0CTL3_DJM_MASK | // Right justified result
ATD0CTL3_S1C_MASK | // S1C|S4C: 5 channels read
ATD0CTL3_S4C_MASK;
ATD0CTL4 = ATD0CTL4_SMP2_MASK | // 12 ATD clock cycles sample time
19;// prescaler value of 19; 40MHz fBUS >> 1MHz fATDCLK
To start a conversion, I do:
ATD0CTL5 = ATD0CTL5_MULT_MASK;
When the conversion is done a Xgate interrupt is generated, and inside the Xgate code I read the values of ATD0DR. The problem isn't caused by interrupts, once that codes without interrupts shows the same strange values. It seems that the ATD clock frequency is too high, but the problem persists even when the ATD Clock is only 1MHz.
Can it be a physical (device) problem? Maybe the "conversion complete flag" is being set too early, I don't know. Please help!
Thanks in advance,
Leandro
解決済! 解決策の投稿を見る。
What about VDDA, VSSA, VRH, VRL pins connections? Are these properly decoupled? What is source impedance, isn't it to high?
What about VDDA, VSSA, VRH, VRL pins connections? Are these properly decoupled? What is source impedance, isn't it to high?
Hi Kef,
The source impedance and decoupling were correct, we followed the instructions of datasheets and applications notes.
But when I saw your answer I decided to double check the pins VDDA, VSSA, VRH and VRL. VDDA and VSSA were ok, but pins VRH and VRL weren't well soldered to the board - the pads (contact) below the pins were in the correct voltage but the pins were floating. So I re-soldered it, adding a little more solder, and the ATD works perfectly!
Thank you for helping me find the solution!
Leandro