Disabling ECT once it's been enabled

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Disabling ECT once it's been enabled

437件の閲覧回数
gator
Contributor I

I'm working with an MC9S12DP512 and have a couple of questions regarding the enhanced capture timer system.

Looking through the datasheet(s) didn't provide an obvious answer but I am wondering if the ECT system can be disabled once it has been enabled.

For example, If one of the ECT pins has been enabled for input capture or output compare and I want to change the pin to use it as a general GPIO pin, how do I go about doing that?

Also, say one of the ECT pins has been configured as an input capture pin. If that input capture pin is not connected to anything external to the MCU, i.e. the input capture pin is floating, will this create any problems? Will it cause increased power consumption?

Thanks

0 件の賞賛
返信
1 返信

358件の閲覧回数
RadekS
NXP Employee
NXP Employee

Hi Gator,

Yes, the ECT may be disabled anytime by clearing TSCR1_TEN bit. This disables the main timer, including the counter. It can be used for reducing power consumption.

 

If you want to disable specific channel or use the specific channel as GPIO, please edit appropriate TCTLx register.

If TIOS_IOSx=1 (The corresponding channel acts as an output compare), the clearing OMx and OLx bits in TCTL1/TCTL2 registers will disconnect timer channel from output pin logic and you may drive this pin as GPIO.

If TIOS_IOSx=0 (The corresponding channel acts as an input capture), the clearing EDGxB and EDGxA bits in TCTL3/TCTL4 registers will disable capturing and you may drive this pin as GPIO.

 

Note: the newer MCUs like S12XE, S12G, S12Z,.. have additional OCPD register which is responsible for this task - connect/disconnected timer channel from output pin logic.

 

Note: In typical cases, we need to also disable appropriate interrupt prior that disconnecting. The interrupts should be disabled when I bit is already set (like in interrupt routine) for avoiding potential spurious interrupt. Please look at AN2554 Clearing and Disabling Interrupt Flags for more details

http://www.nxp.com/files/microcontrollers/doc/app_note/AN2554.pdf

 

Any GPIO with digital input buffer active may cause increased power consumption when the voltage level at this pin reach the linear area near to VDDX/2. So, keeping input pins floating is not an optimal solution. We should keep the pin in some known state (as output, as input with internal/external pull-up/down, or connected to power supply rail). This is not valid for port AD until we enable appropriate digital input buffer by ATDxDIEN register(s).

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信