Detect double bit errors in RAM (S12Z ECC)

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Detect double bit errors in RAM (S12Z ECC)

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niba
Contributor III

Hello community,

I use the S12Z in my product and have to detect faults using ECC. For detecting flash double bit errors I use FERSTAT_DFDF bit. And I test it with FCNFG_FDFD.

But how to detect double bit errors in RAM? And how to test the detection?

What is the MMCECL? Can I use it?

MMCECL.jpg

Thank you very much!

1 Reply

780 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

The double bit ECC fault is uncorrectable error and it will trigger a machine exception (interrupt vector 5). A machine exception is considered to be a severe system error, so nothing is written on the stack and it is not possible to return to application code by using an RTI instruction. The MMCEC registers save information about the S12Z CPU, which can be then used to identify the source of the machine exception. Then, a correct recovery action should be the MCU reset.

More information about exception is in the S12ZCPU_RM, chapter 7, or refer to this example.

Single/double RAM ECC errors can be forced, as shows this example. See also chapter 7.3.7 of the RM.

 

Regards,

Daniel