About PWM output

[Xuqq]

Hello everyone,

While using s12zvl to output PWM, the PWM duty output can be set to 0 in following two ways:

Way 1: The value of the PWM0DTY23 register is set to 0, That is, set the duty ratio register to 0 without disable the PWM output.

Way 2: The value of the PWM0E register is set to 0, That is, disable PWM output.

Both Ways can control PWM off, but when PWM is started (duty: 2%), it is found that the duty of the first PWM cycle is incorrect in the case of way1, The cycle of PWM in the first cycle of way2 is correct.

I want to know the difference between the two ways。

[danielmartynek]

Hi @Xuqq,

What does it mean the PWM is incorrect?

Can you show some waveforms?

If the channel stays enabled, the duty register is buffered - that would be the difference.

You can write 0x00 to the counter to sychronize it.

BR, Daniel

[Xuqq]

Hi Daniel,

Thanks for your reply.The waveform is as follow:

Cycle A (second cycle)is right PWM, with a cycle of 10ms and a duty cycle of 2%.

Enable PWM for the first time at D, in the first cycle, a waveform of B + C appears.

I think there should be only B but no C.

In addition, clear the counter register before enabling PWM, the waveform is correct.

Could you tell me why is the duty cycle register buffered?

I know this register is double buffered, but I don't know what it means to be buffered.

Best regards,

Xqq

[danielmartynek]

It is explained in the RM shown below, basically, it allows changing the duty-cycle at the end of the period (typical use case) not at the time the register is written.

The polarity bit is set to 1, right?

Since it is double-buffered, and the last value is 0, it does not go down in the first cycle.

You need to synchronize it by writing 0 to the counter.

BR, Daniel

[Xuqq]

Hi Daniel,

Thanks for your help. The polarity bit is set to 1. Writing 0 to the counter register can solve this problem.

Write a non-zero value to the duty register. After closing the PWM output, there is no problem to restart the waveform. However, write 0 to the duty register. After closing the PWM output, if you do not write 0 to the counter register, there will be a problem.

Is it a special operation to write 0 to the duty register?

Is the asynchronization of the counter register due to the random disable the PWM output? Are there other reasons?

Best regards,

Xqq

[danielmartynek]

Hello @Xuqq,

I can't reproduce it.

I used this example:

https://community.nxp.com/t5/S12-MagniV-Microcontrollers/PWM-example-code-for-S12ZVL/ta-p/1120954

And added this code:

enable_PWMs();

delay = 1000;
while(delay--){}

PWMDTY0 = 0x00;

delay = 10;
while(delay--){}

PWMDTY0 = 0x02;

PWM0 (PP0):

Can you test it?

BR, Daniel

[Xuqq]

Hello Daniel,

I am sorry for the late reply，this problem has been solved, thank you