1M Flash Memory addressable thru SPI0?

[Pang]

Hi everyone,

I want to read/write 1M byte flash memory thru SPI0.  Can someone show me how to make it?

I am using CW V4.6 with MC9S12XDP.

Thanks

Pang

[bigmac]

Hello Pang,

What sort of flash memory do you wish to utilize?  The solution should be straight forward if you select a serial, SPI compatible, data flash device.  It is then a question of matching the SPI setup to the requirements of the external flash, and providing the sequence of byte transactions necessary to communicate with the device (per its data sheet).  I can't be more specific without knowledge of your device type.

If a parallel flash device is required, SPI communications is possible, but will involve a significantly more complex hardware interface, with additional shift registers and control lines necessary.

Regards,

Mac

[Pang]

Mac,

My serial memory is S25F004A0 thru SPI0. It looks like  that I have to define some micros for communication settings.

#define CS_FLASH_ON PTH_PTH1= 0

#define CS_FLASH_ON PTH_PTH1=0

There might be some other settings for data read/write. I am not sure how to write right code for data access exceed to 64K if I just use 2-byte for data addressing. Could you please clarify whatelse to do so that I can read/write beyond 64K?

One question, is there a sector (64byte or bigger 512byte) for data allocation in this 1M serial falsh memory just like DOS Disk Management.?

Thanks,

Pang

[bigmac]

Hello Pang,

I couldn't find your exact part using Google, but did find apparently quite similar part numbers.  These have 512 Kbyte capacity, rather than 1Mbyte, and have a minimum erase sector of 4Kbyte.  Who manufactures the part you intend to use?

Yes, you will need to allocate the CS signal from GPIO.  You will also need to set CPOL and CPHA control bits to suit the flash device (0,0 or 1,1).

For the data sheets that I examined, a 24-bit (3-byte) address is sent to the device, following the command byte.  This will allow addressing the complete range for the device.  The most significant address byte is sent first.

As mentioned above, the minimum erase block size appears to be 4Kbyte.  This will likely make the management of smaller data allocation blocks more complex.  Perhaps others may be able to advise you on a suitable data management strategy.

Regards,

Mac