On my T4240 boards I get the invalid value from the MPIC_WHOAMI register which prevents the required operation of the MPIC_IPIDR# registers. Secondary CPU cores can signal the boot core but the boot core cannot signal the secondary CPU's.
I suspect this is a configuration problem with the MPIC but I have been unable to find adequate details in the T4240RM document to discover how.
Has anybody else encountered this problem on T4240 cores? Is there a suitable work around for core directed interrupts?
Thanks
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Of course it was because I'm an idiot. The JTAG probe would obviously see invalid when reading that register, not the value as seen by the CPU core being debugged.
Weird thing was the per CPU registers in the 06_0090, 06_1090, etc were reading 0x3F, too - I expected them to read what that CPU core would see.
Of course it was because I'm an idiot. The JTAG probe would obviously see invalid when reading that register, not the value as seen by the CPU core being debugged.
Weird thing was the per CPU registers in the 06_0090, 06_1090, etc were reading 0x3F, too - I expected them to read what that CPU core would see.
> On my T4240 boards I get the invalid value from the MPIC_WHOAMI register
How exactly did you do that?