T2080 and P2041 flush cache

[hv]

I learned that I can use dcbf instruction to flush both L1 and L2 caches for the T1040 (e5500).

I also need to flush caches for T2080 (e6500) and P2041 (e500mc)...would dcbf work to flush L1, L2 and platform cache for the T2080 and P2041?  does platform cache get treated differently?

Thanks!

[scottwood]

dcbf is the standard, architected mechanism to flush a cache block from all caches on all Power Architecture systems.

[hv]

Yes, but if I use dcbf on the T1040, that would flush both L1 and L2 caches. Does dcbf work like that on the T2080 and P2041? That dcbf would flush both L1 and L2 caches. I’m concerned about the architectural difference among the 3 processors and that I would need to flush cache differently on all 3.

Thanks!

[scottwood]

dcbf affects all caches on all Power Architecture chips, including T1040, T2080, and P2041.