T2080 DT File

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T2080 DT File

Contributor I


I am trying to understand the dts files of T2080. However, I had difficulty in understanding few things that I have listed below. Could anyone please explain this or point me towards the reference document? 1. In file t208xrdb.dtsi , how is the range values decided?

pci1: pcie@ffe250000 {

                                reg = <0xf 0xfe250000 0 0x10000>;

                                ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000

                                                  0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;

                                pcie@0 {

                                                ranges = <0x02000000 0 0xe0000000

                                                                  0x02000000 0 0xe0000000

                                                                  0 0x20000000

                                                                  0x01000000 0 0x00000000

                                                                  0x01000000 0 0x00000000

                                                                  0 0x00010000>;



     2. In file qoriq-mpic4.3.dtsi , how is the interrupts value defined for msi0-msi3?

  1. In file elo3-dma-1.dtsi,  How are the reg values defined in dma channel child nodes as shown below?

                dma-channel@80 {

                                compatible = "fsl,eloplus-dma-channel";

                                reg = <0x80 0x80>;

                                interrupts = <33 2 0 0>;

4. qoriq-bman1.dtsi file has interrupts defined as below, for which explanation couldn’t be found

bman: bman@31a000 {

                compatible = "fsl,bman";

                reg = <0x31a000 0x1000>;

                interrupts = <16 2 1 2>;

                fsl,bman-portals = <&bportals>;

                memory-region = <&bman_fbpr>;


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NXP TechSupport
NXP TechSupport

Ranges property describes PCIe address space and CPU address space translation mapping.

 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000

           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;

PCIe memory address 0x0_e0000000 is mapped to CPU address 0xc_20000000 , the mapping length is 0x0_10000000.

PCIe IO address 0x0_00000000 is mapped to CPU address 0xf_f8010000, the mapping length is 0x0_00010000.

Please refer to Documentation/devicetree/bindings/pci/host-generic-pci.txt in Linux Kernel source code for details.


- interrupts : each one of the interrupts here is one entry per 32 MSIs, and routed to the host interrupt controller. the interrupts should be set as edge sensitive.  If msi-available-ranges is present, only the interrupts that correspond to available ranges shall be present.

Please refer to Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt for details.


- DMA channel nodes:

        - compatible        : must include "fsl,eloplus-dma-channel"

        - reg               : DMA channel specific registers

        - interrupts        : interrupt specifier for DMA channel IRQ

        - interrupt-parent  : optional, if needed for interrupt mapping

Please refer to Documentation/devicetree/bindings/powerpc/fsl/dma.txt


  1. Please refer to Documentation/devicetree/bindings/soc/fsl/bman.txt

- interrupts

        Usage:          Required

        Value type:     <prop-encoded-array>

        Definition:     Standard property. The error interrupt

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