T1040 proper reset

[lukaszprzeniosl]

Hello there,

I am working with a board based on the T1040 processor. Currently I am implementing the reset sequence in the companion device for the T1040. I have noticed the following behavior: If I reset the device during u-boot routine, the device starts normally again. However, If I reset the device after the host Linux system is up, the device doesnt turn on anymore. I need to make a complete power recycle.

I tried many different reset schemes from simple PORESET_B asserting to asserting both PORESET_B and HRESET_B + HRESET_B only as well. From the datasheet it seems that there are 2 kinds of resets: soft and hard- I tried both, the behavior is the same. I am connected to the RESET_REQ_B output, but I dont monitor it at the moment.

Am I missing something here? I would appreciate all help.

[lukaszprzeniosl]

Hi Ufedor,

Of course its not about debugging the FPGA- I am still asking T1040 wise only. Will investigate further, thank you for your feedback.

[lukaszprzeniosl]

Ufedor,

I think I am starting to get the general idea here... Indeed in the design cfg_rcw_src6 and cfg_rcw_src8 are controlled in order to choose the boot mode. The thing is, those lines remain "untouched", no matter if the main OS boots or not yet. The FPGA chip controlling the T1040 has no information on either the device has booted already or either its in the bootloader state.

[Wj_khi]

Hi i have also been facing same issue of HRESET_B not asserting at start after PORESET deassertion in my T1040 custom board along with FPGA. Don't know why it s happining.

I also have checked that the CLKSTP_OUT test point signal has no clock present. While my board SYSCLK and DDR CLK is fine.

I have a doubt that my reset logic of PORESET assertion and deassertion did not seems to work.

Please suggest how can i run self test of processor or any further line of action to make the custom board alive and running. 

Thanks