We wants to use eMMC with HS200/HS400 1.8v modes. Try to checking with eMMC to MMC converter to SD/MMC slot on LS1043A-RDB.
but HS200/HS400 1.8v modes do not work.
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index ff401222ff..a804f5123c 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -70,6 +70,14 @@ status = "disabled"; }; + esdhc: esdhc@1560000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x1560000 0x0 0x10000>; + interrupts = <0 62 0x4>; + big-endian; + bus-width = <4>; + }; +
index 1c40ffb4c1e8..9b702defc72a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -26,6 +26,14 @@
};
};
+&esdhc {
+ mmc-hs200-1_8v;
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
+};
+
&i2c0 {
status = "okay";
ina220@40 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3366f316c8a2..e6fec016b619 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -320,7 +320,7 @@
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
big-endian;
- bus-width = <4>;
+ bus-width = <8>;
};
root@nxp-ls1043:~# cat /sys/kernel/debug/mmc0/ios
clock: 0 Hz
vdd: 0 (invalid)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 0 (off)
bus width: 0 (1 bits)
timing spec: 0 (legacy)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
git log -p 4c6913d1d9f1f487226e06916bc5c5c38d3812d6 commit 4c6913d1d9f1f487226e06916bc5c5c38d3812d6 Author: Yangbo Lu <yangbo.lu@nxp.com> Date: Tue Mar 3 10:20:18 2020 +0800 configs: disable eMMC HS200 support on layerscape platforms
for uboot, I found disable eMMC HS200 funcitons.
It involving uboot modification.
I want to know , whether support HS200 1.8v for LS1043A-RDB
[2023-07-05 15:00:29.827] [ 37.399655] mmc0: Timeout waiting for hardware cmd interrupt.
[2023-07-05 15:00:29.983] [ 37.405390] mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
[2023-07-05 15:00:29.983] [ 37.411819] mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002102
[2023-07-05 15:00:29.983] [ 37.418248] mmc0: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
[2023-07-05 15:00:29.983] [ 37.424677] mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
[2023-07-05 15:00:29.983] [ 37.431105] mmc0: sdhci: Present: 0x01fd0009 | Host ctl: 0x00000020
[2023-07-05 15:00:29.983] [ 37.437534] mmc0: sdhci: Power: 0x00000000 | Blk gap: 0x00000000
[2023-07-05 15:00:29.983] [ 37.443963] mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000020f8
[2023-07-05 15:00:29.983] [ 37.450391] mmc0: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000
[2023-07-05 15:00:29.983] [ 37.456819] mmc0: sdhci: Int enab: 0x007f1087 | Sig enab: 0x007f1083
[2023-07-05 15:00:29.983] [ 37.463249] mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002102
[2023-07-05 15:00:29.983] [ 37.469677] mmc0: sdhci: Caps: 0x37fa0000 | Caps_1: 0x0000af00
[2023-07-05 15:00:29.983] [ 37.476105] mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x00000000
[2023-07-05 15:00:29.983] [ 37.482533] mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
[2023-07-05 15:00:29.983] [ 37.488962] mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
[2023-07-05 15:00:29.983] [ 37.495390] mmc0: sdhci: Host ctl2: 0x00000000
[2023-07-05 15:00:29.983] [ 37.499823] mmc0: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000