hi,
For our custom board we are using a MLC NAND flash with minimum required ECC of 40-bit per 1117 bytes of data. But from the driver files, it support only 4/8-bit ECC. Is there is any option for enabling 40-bit ECC in sdk 0.5??
hi pavel,
Our nand have 40-bit ECC, not 4/8-bit. For that i think we need to change nand_ecclayout in both kernel and u-boot. I need some help for finding some variables which i dont know what it means. Those variables are " .eccbytes " inside nand_ecclayout, nand->ecc.size and nand->ecc.bytes (in file fsl_ifc_nand.c).
These are our nand related data
– Page size x8: 8936 bytes (8192 + 744 bytes)
– Block size: 256 pages (2048K + 186K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– 40-bit ECC per 1117 bytes of data
U-boot for the LS1043A board supports 4-bit and 8-bit ECC. Change the IFC_CSOR for your NAND Flash in u-boot configuration file.
Have a great day,
Pavel Chubakov
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Hi,
From the reference manual we have seen that it supports 40-bit ECC per sector of 1 KB. But from the driver we have seen that it supports 4/8 bit ECC. Is there is any option for enabling 40-bit ECC in sdk?? Is there is anything that we can refer for this?
The LS1043 IFC supports BCH code for 4-bit and 8-bit error correction per sector of 512 bytes and 24 and 40-bit ECC per sector of 1 KB.
Have a great day,
Pavel Chubakov
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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