ECC error injection info

[veerendranathj]

Hi,

Please provide below info..
1. Is mandatory to have test address aligned to 8 bytes? Why?

2. How it differs using Read vs Write operation to generate ECC error? 

3. How error injection will differ when I use 32-bit read/write compared to 64-bit read/write when test address not aligned to 8 bytes?

Regards,

Veeru

[Bulat]

1. No.

2. "Generate ECC error" can mean a) to insert an error in to the memory or b) to detect an existing error in the memory.

For a) case writes are used, for b) case reads are used.

3.

a. When ECC is enabled, the DDR controller uses only 64-bit writes.

b. If the user uses a 64-bit write, the DDR controller performs it directly.

c. If the user uses a 32-bit write, the DDR controller uses read-modify-write sequence, final write is 64-bit one as stated above. In this case "read" can potentially detect previously injected errors, so cause a ECC-related exception.

Regards,

Bulat