Changing to CPU operating frequencies for PPC5020

[cartilage01]

We are using SBCs with the PPC5020 onboard. In the P5020RM I have been read about a feature of that processor that allow you to change the clk frequencies via software. While I have found a number of documents touting this feature I have not been able to uncover any documents explaining how to implement it. From what I understand I should be able to program the CC1 and CC2 PLLs and select their use for 2 the cores and also setup a divisor 1,2,4 to that clock on each core. I have seen how you can setup these values in the reset control word but I am interested on how to change these settings once the board has booted. All of my internet searching has turned up nothing please help and point me a documentation or examples that explain this feature.

[r8070z]

Have a great day,

The core n clock control/status register (RST_CLKCnCSR) control the clock frequency selection for each core. CLKC0CSR corresponds to core 0, and CLKC1CSR corresponds to core 1.

Please see section 4.5.1 “Core n clock control/status register” in the P5020 QorIQ Integrated Multicore Communication Processor Family Reference Manual, Rev. 4, 7/2012

You can download that manual from the Freescale site on the P5020 page

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=P5020&fpsp=1&tab=Documentation_Tab

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[cartilage01]

This does look like what I am trying to find. I am not sure the offset needed for access this. I assume it is based off the CCSR but an offset of zero (0h base + 0h offset + (32d × i)) does not make sense. So in this case what is the base.

Thanks again for the reply.

[sinanakman · Accepted solution]

Hi Richard

According to Table 2-104. CCSR Block Base Address Map

in P2050RM Clocking registers are mapped at

CCSRBAR (default address 0x0_FE00_0000), plus

the functional block base address (0x0E_1000).

So, for example  RST_CLKC0CSR would be at

0xFE0E_1000 with default CCSRBAR.

Regards

Sinan Akman

[cartilage01]

Thanks I am still trying to find my way around the documentation. Thanks for bringing it home for me.