Hello,
We are trying to boot from QSPI, using the following DIP-SWITCH configuration:
SW2 0010_0111
SW3 0110_0001
after reset, we can see clock and chip select to the QSPI device, but it looks like the CPU sends 0000_0110 = 0x6 to the QSPI device.
0x6 is not a recognized command by the QSPI device, so it is probably ignored (nothing returned from the QSPI device).
However, 0000_0011 = 0x3 is valid QSPI command (read command).
We suspect that we miss one clock cycle at the beginning of the sequence (perhaps since the QSPI clock goes via the CPLD).
Have the boot from QSPI been tested on LS1021A-TWR platform?
Is there anything else we should configure to boot from QSPI device?
Note: when we boot from sd-card, we can detect, read and write the QSPI device.
Thanks.
Solved! Go to Solution.
Hi Shay
There is an erratum A-008787 which limits qSPI
boot with core pll above 500Mhz.
Is this related to you case ? If you don't
have the errata list, please ask your FAE
I think it is available under NDA.
Hope this helps
Sinan Akman
Hi Shay
There is an erratum A-008787 which limits qSPI
boot with core pll above 500Mhz.
Is this related to you case ? If you don't
have the errata list, please ask your FAE
I think it is available under NDA.
Hope this helps
Sinan Akman
Thanks Sinan.
Actually, according to QSPI A-007979, boot from QSPI is not supported in Rev 1.0.