Dear Experts:
We design a board using LS1017A CPU, connect 2 MARVELL 88e1512 PHY to mac0 and mac1 of the TSN switch.
The serdes config is 99cc. Our SDK used is lsdk21.08.
In u-boot we cannot find PHY, "mii info" command or "mdio list" don't show any devices.
Here's boot log: You can find the error at the last, "felix-switch: Failed to register fixed-link for CPU port"
NOTICE: BL2: Booting BL31
NOTICE: BL31: v2.4(release):LSDK-21.08-1-g5d950d6a2
NOTICE: BL31: Built : 14:15:43, Mar 15 2024
NOTICE: Welcome to ls1028ardb BL31 Phase
U-Boot 2021.04-00001-gec02921ea0-dirty (Mar 19 2024 - 14:16:02 +0800)
SoC: LS1017AE Rev1.0 (0x870b2410)
Clock Configuration:
CPU0(A72):800 MHz
Bus: 300 MHz DDR: 1300 MT/s
Reset Configuration Word (RCW):
00000000: 2000340c 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 02003150 00002580 00000000 0020824e
00000030: 00001001 00000008 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 100e7512 00000000
00000070: cc990000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1017AE Rev1.0-unknown, Version: O, boot from SD
FPGA: v255 (unknown)
SERDES1 Reference : Clock1 = 161.13MHz Clock2 = 161.13MHz
DRAM: 958 MiB
DDR 958 MiB (DDR4, 32-bit, CL=10, ECC off)
GPIO set OK
Using SERDES1 Protocol: 52377 (0xcc99)
PCIe1: pcie@3400000 disabled
PCIe2: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
EEPROM: Read failed.
In: serial
Out: serial
Err: serial
SEC0: RNG instantiated
Net:
Warning: enetc-2 (eth1) using random MAC address - 56:95:41:40:e4:ed
eth1: enetc-2felix-switch felix-switch: Failed to register fixed-link for CPU port
felix-switch felix-switch: Failed to register fixed-link for CPU port
I don't know if our dts files or other config is wrong
Really looking forward to your help! Many thanks!
dts files of U-boot are attached.
BR,
Yuxiao Ji
Solved! Go to Solution.
Please add the following in configs/ls1028ardb_tfa_defconfig, then rebuild u-boot.
CONFIG_PHY_MARVELL=y
Please check your hardware design whether swp0 connects to PHY address 0x3.
Hi yiping:
We have modified the dts files, now it's better, u-boot logs changed to:
Warning: enetc-2 (eth1) using random MAC address - 7a:02:b7:ec:57:6d
eth1: enetc-2Could not get PHY for emdio-3: addr 3
Warning: swp0 (eth2) using random MAC address - da:51:9b:a8:11:cf
, eth2: swp0
Warning: swp1 (eth3) using random MAC address - fe:b4:dd:4f:b8:0f
, eth3: swp1
It seems that we can find PHY at address 4, but PHY @3 is still missing
And the mdio and mii command output is:
=> mdio list
enetc-2:
emdio-3:
4 - Generic PHY <--> swp1
felix-switch:
=> mii info
PHY 0x00: OUI = 0x20F9, Model = 0x00, Rev = 0x00, 10baseT, HDX
PHY 0x01: OUI = 0x20F9, Model = 0x00, Rev = 0x00, 10baseT, HDX
We also did a loop back traffic test, looping back macs at swp0 and swp1, then do ping test, also failed...
Looking forward to your reply, thanks!
BR,
Yuxiao Ji
Please add the following in configs/ls1028ardb_tfa_defconfig, then rebuild u-boot.
CONFIG_PHY_MARVELL=y
Please check your hardware design whether swp0 connects to PHY address 0x3.
hi yiping:
sorry for the delay, but adding the driver didn't solve our problem...
maybe something wrong with our hardware, will check that and if any findings I will contact you later
BR,
Yuxiao Ji
Please define mdio PHY as the following in dts files.
In fsl-ls1028a.dtsi
enetc_mdio_pf3: mdio@0,3 {
compatible = "fsl,enetc-mdio";
reg = <0x000300 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
};
In fsl-ls1028a-rdb.dts