MPC8308 U-boot Debugging

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MPC8308 U-boot Debugging

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rameshchandraka
Contributor III

Sir

I am currently working on MPC8308 RDB Board  with Code warrior 8.8 along with USB Tab.

I am following the standard procedure to debug the U-boot via Code warrior.

Due to Reset problem , I could not able to Debugging of RDB board.

Pls help me

Ramesh

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rameshchandraka
Contributor III

Dear Yiping,

Thanks a lot.

I used LTIB tools chain to compile and Windows basd Code warrier for Debugging the u-boot

Problem solved.Local Freesacle FAE also helped me.

We will meet in next ..Topic...Thanks.

Regards

Ramesh.

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,


First it's better to verify the basic connection between CodeWarrior and the target board.


Please follow "EPPC New Project Wizard" to create a bare board project for for MPC8308SOM, then change the initialization file for MPC8308RDB from Edit->Debug Version Settings->Debugger->EPPC Debugger Settings->Use Target Initialization File, and use the attached file 8308erdb_init.cfg.

I am not sure whether there is valid RCW on your target, so please use CodeWarrior JTAG configuration file, please open the panel Edit->Debug Version Settings->Remote Debugging->Edit Connection, and configure JTAG Configuration file as the attached 8308_HRCW_jtag.txt.


Please connect CodeWarrior to the target from Debug->Connect.

If the connection is failed, please enable CCS log from Edit->Debug Version Settings->Debugger->Remote Debugging->Edit Connection->Enable Logging, then attach the CCS log, I will do more investigation for you.


Have a great day,
Yiping Wang

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rameshchandraka
Contributor III

Dear sir

We have done as per the steps suggested by you.

i have got Error while connecting JTAG probe with MPC8308 RDB and Error is attached as image file 1 and 2.

CCS log also attached

Pls suggest me sir

Regards

Ramesh

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,


According to your CCS log, CCS is killed just after configuring the CC as utap.

Do you use the new product CodeWarrior TAP with both Ethernet port and USB port now? If so, have you installed Patch 8.8.6 to update CCS driver from CW-POWER-NETWORKING: CodeWarrior Development Studio for PowerQUICC (Classic IDE).

And do you use CodeWarrior 8.8 buildID 80229 downloaded from http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=CW-POWER-NETWORKING&fpsp=1&tab=Design...?

This problem looks like CodeWarrior itself problem, first please apply Patch 8.8.5 including all the previous patches, then apply 8.8.6 if you are using CodeWarrior TAP(no need USB TAP).


Have a great day,
Yiping Wang

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rameshchandraka
Contributor III

Sir

Thanks.Your Right.after update i could able to make small sample application and debug it.

But i requirement is debugging of  the u-boot came with LTIB release..

So

1 ) shall i use Windows hosted Code warrior with Cygwin for LTIB tool chain?

OR

2 ) Shall i use Windows hosted code warrior (8.8) with Vmware

OR

3) Linux platform edition - Code warrior - 8.8

Pls suggest ,:smileysad:

Ramesh

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,

I suggest you install Linux edition CodeWarrior 8.8 on the Ltib installation machine(Linux).

For Linux edition CodeWarrior, you need to install udev rules (in ccs/driver/) separately. Do you use CodeWarrior TAP or USB TAP now? Because if you use the new product CodeWarrior TAP, you also need to update the CCS to the latest.

I also attached a ppt about u-boot debugging for you.


Have a great day,
Yiping Wang

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rameshchandraka
Contributor III

Sir

     Exactly I can confine my problem.

Code warrior is debugging the small Code in windows platform. -Small Hello world example. ---Well.

But , HRRESET is not at all working.Even we have added extra circuit to the MPC8308 RDB Eval board.(which is not taken care ) as per the AN4028 document ( Page-16).

BUT HRRESET is vey important to Debug the Code the U-BOOT code


Pls help me.Our Designed Board also facing the same issue.( It is similar to MPC8308RDN schmatic).

HOW TO MAKE THE HRESET to work fine?


Regards

Ramesh

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yipingwang
NXP TechSupport
NXP TechSupport

Hello ramesh,

If you could debug the sample "Hello world" program on the target board, there should be no problem with HRESET, because the first stage of debugging the sample project is "reset to debug", you could see the target reset when debugging, please refer to the following part from CCS log.

CCS: 0000    :    ccs_get_config_chain

CCS:        :        serverh = 0

CCS:        :        device_list: (size = 1)

CCS:        :            device[0]:: core_type=55;    device_descr=[ir_length:0;dr_bypass_length:0;bypass_instruction:0]

CCS:        :    ccs_get_config_chain; ccs_error = 0

CCS: 0000    :    ccs_config_template

CCS:        :        coreh = [serverh:0;cc_index:0;chain_pos:0]

CCS:        :        config_reg = 1

CCS:        :        config_data = 1

CCS:        :    ccs_config_template; ccs_error = 0

CCS: 0000    :    ccs_config_template

CCS:        :        coreh = [serverh:0;cc_index:0;chain_pos:0]

CCS:        :        config_reg = 2

CCS:        :        config_data = 1644429443

CCS:        :    ccs_config_template; ccs_error = 0

CCS: 0000    :    ccs_config_template

CCS:        :        coreh = [serverh:0;cc_index:0;chain_pos:0]

CCS:        :        config_reg = 3

CCS:        :        config_data = -1537184768

CCS:        :    ccs_config_template; ccs_error = 0

CCS: 0000    :    ccs_send_message

CCS:        :        coreh = [serverh:0;cc_index:0;chain_pos:0]

CCS:        :        message = 3

CCS:        :    ccs_send_message; ccs_error = 0

CCS: 0000    :  ccs_reset_to_debug

CCS:        :        serverh = 0

CCS:        :        cc = 0

CCS:        :    ccs_reset_to_debug; ccs_error = 0

CCS: 0000    :    ccs_read_reg

CCS:        :        coreh = [serverh:0;cc_index:0;chain_pos:0]

CCS:        :        index = 2032

CCS:        :        count = 1

CCS:        :        value: (size = 1)

CCS:        :            0x00000100

Again, whatever problem you encountered, please enable CCS log from Edit->Debug Version Settings->Debugger->Remote Debugging->Edit Connection->Enable Logging, and attach the CCS log to me to understand your current status clearly.

You could attach to the target from Debug->Attach to Process, then reset from Debugger from Debug->EPPC->Hard reset, and capture the CCS log to me.


Have a great day,
Yiping

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rameshchandraka
Contributor III

Sir

Normal hello world sample program (windows platform ) , I could able to issue HREST.It is working in simple debugging without Attach to process

Problem is in U-boot debugging

Following is done on u-boot Debugging in Linux Fedora

As per your Procedure , attach to the target from Debug->Attach to Process, then reset from Debugger from Debug->EPPC->Hard reset.

During this time Config Jumber setting is


S1 swich config : b'1111

S2 switch config:b'0000


and

Reset Configuration High Word is : 0xA4607800.

Reset Configuration Low Word is:  0x62040000

  

I am attaching the log message with this mail

Regards

Ramesh:smileysad:

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yipingwang
NXP TechSupport
NXP TechSupport

Hello ramesh,

There is no error in the attached CCS log, and ccs_reset_to_debug is executed successfully.

After attach to the processor and execute Debug->EPPC->Hard reset in CodeWarrior, did your target board get reset?


Have a great day,
Yiping

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rameshchandraka
Contributor III

1)Target is not reset  when execute Debug->EPPC->Hard reset in CodeWarrior which is clearly viewable via console message.

But,

Target is reset  when execute Debug->EPPC->Hard reset in CodeWarrior along with modified circuit via  JTAG connector .Further It is not starting the debugging from Start.S !!!!

Modified Circuit

8308RDB Evaluation board with modified reset connection as per application note AN4028.pdf at page no 16.

Modified circuit is basically modifying PORESET coming out from reset IC(U53) and COP-HRESET using a AND gate IC (we put externaly in small board).

and output of AND GATE connected to PORESET of processor.

While debugging without using modified circuit , It is going step by step  debugging u-boot in linux platform (CW8.8)

but , there is NO output message on the console with respect to the source plane steps printf ( for debugging)

SO,

Either Problem may be on designing HRREST Signal / OR / Setting the RCW word.???:smileyconfused:

IT IS CRITICAL ! , you Know up and down of the MPC8308.

Pls help

Now We are measuring reset timing

Regards

Ramesh

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,

Please note that after attach to the target and execute "Debug->EPPC->Hard reset", you should not get any output from the console, because execute reset_to_debug command from CCS, the target should set the PC register at 0xFFF00100, stop at the reset vector of u-boot, this just let you debug u-boot from Start.S. If you click Run, u-boot will continue to execute.


You mentioned "No Output message", please note at the first stage of u-boot, there is no console message printed out.


Actually your CCS log didn't indicate any information about the error of HREST.



Have a great day,
Yiping

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rameshchandraka
Contributor III

Dear sir

Here Only Problem

Basicaly HREST is Not Happening

step 1) Debug before MMU is enabled with Alternate Address 0xFFF00000.After "Debug->EPPC->Hard reset

Debug cursor is wating at start .S file

here No message ----- This is OK.

Step 2)Debug after MMU is enabled with Alternate Address 0x00000000 ( disabled ) .After "Debug->EPPC->Hard reset

Debug cursor is NOT GOING TO start.S file


I have cheked in Vxworks Environment also, HREST IS NOT happening  ( BKM> cf reset hreset  / after enable).

Pls find the one page pdf. COP is driving HRESET low, There is no sinking of this signal . pls see the schmatic. multiple IC using this signal .




Regards

Ramesh

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,

According to the CCS log which you provided, the CCS reset command should be executed successfully.

Let's focus on whether your target board reset or not.

About the step 1, after click "Debug->EPPC->Hard reset", whether the debugger go to reset vector and when step into, the debug cursor enter into start.S file.


If yes, it indicates there is no problem with HREST.


Have a great day,
Yiping

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rameshchandraka
Contributor III

Dear Sir

    Yes Agreed.HRESET is happening as it is going to Start.S (During Debug before MMU is enabled with Alternate Address 0xFFF00000).

NOW.

Step 2)Debug after MMU is enabled with Alternate Address 0x00000000 ( disabled ) .After "Debug->EPPC->Hard reset

Debug cursor is NOT GOING TO start.S file


Here My Thoughts are


1.RCW Word Source is supplied via JTAG configuration file.Can I use Table 4-20. RCW Values Corresponding to Hard Coded Options?

2.Can I make the Reset Vector 0xFFF0_0000 similar to e300 core Power ON reset vector? ( MSR[IP] Bit,High BOOT enable,NOR Boot )

3.U-Boot TEXT_BASE is fixed with 0xFE00_0000.where from it comes???:smileyshocked:


Your contribution to Freescale community is marvelous.

Pls help us

Regards

Ramesh




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yipingwang
NXP TechSupport
NXP TechSupport

Hello Ramesh,

The option "Alternate Address" is used to tell debugger where to find the executing code, so this is why you encountered the problem in step 2.

About your queries.

1. The normal method is flash RCW on NOR FLASH, you could find RCW bin file in Linux BSP ISO.

2. Yes.

3. TEXT_BASE is defined in board/freescale/mpc8308erdb/config.mk or include/configs/MPC8308RDB.h.


Have a great day,
Yiping

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rameshchandraka
Contributor III

Dear Yiping,

Thanks a lot.

I used LTIB tools chain to compile and Windows basd Code warrier for Debugging the u-boot

Problem solved.Local Freesacle FAE also helped me.

We will meet in next ..Topic...Thanks.

Regards

Ramesh.

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