Some questions about PF8100/PF8200 's Fault detection

[k23428]

1. On page 33:

How to understand "the fault condition is cleard"?

For example, if SW1 shutdown due to OV fault, I suppose that user clears the SW1_OV_S bit by I2C means clear the fault condition. Am I right?

2. On page 33~34:

A) How can processor reset the counter value ? I found the FAULT_CNT[3:0] is Read only.

B) Again, how to understand "the faults have been cleared ?"

[guoweisun]

1: fault condition clear means the fault condition disappear not  clear the fault bit.

2:FAULT_CNT[3:0] can be read and write I test it in EVB.

3:Same answer with questions1.