P1020WLAN - Extended storage

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P1020WLAN - Extended storage

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sunder
Contributor I

P1020WLAN-AP board is booting from the on-board NOR flash. The current jumper settings is default to use on-board NAND flash as the extended storage with booting up with NOR Flash.  With P1020wlan.dtb, the NAND partition is not recognized.

P1020wlan.dtb did not contain specification for NAND flash at chip select 1.  It has been modified in the DTB file as given below through dts file.

       localbus@ffe05000 {

              reg = <0x0 0xffe05000 0x0 0x1000>;

              ranges = <0x0 0x0 0x0 0xec000000 0x4000000 0x1 0x0 0x0 0xff800000 0x40000 0x2 0x0 0x0 0xffb00000 0x20000>;

              #address-cells = <0x2>;

              #size-cells = <0x1>;

              compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";

              interrupts = <0x13 0x2 0x0 0x0 0x10 0x2 0x0 0x0>;

              nor@0,0 {

                     #address-cells = <0x1>;

                     #size-cells = <0x1>;

                     compatible = "cfi-flash";

                     reg = <0x0 0x0 0x4000000>;

                     bank-width = <0x2>;

                     device-width = <0x1>;

                     partition@0 {

                           reg = <0x0 0x20000>;

                           label = "NOR DTB Image";

                     };

                     partition@20000 {

                           reg = <0x20000 0x3e0000>;

                           label = "NOR Linux Kernel Image";

                     };

                     partition@400000 {

                           reg = <0x400000 0x3a00000>;

                           label = "NOR Root File System";

                     };

                     partition@3e00000 {

                           reg = <0x3e00000 0x100000>;

                           label = "NOR Vitesse-7385 Firmware";

                           read-only;

                     };

                     partition@3f00000 {

                           reg = <0x3f00000 0x100000>;

                           label = "NOR U-Boot Image";

                           read-only;

                     };

              };

             nand@1,0 {

                     #address-cells = <0x1>;

                     #size-cells = <0x1>;

                     compatible = "fsl,p1020-fcm-nand", "fsl,elbc-fcm-nand";

                     reg = <0x1 0x0 0x40000>;

                     partition@0 {

                           reg = <0x0 0x100000>;

                           label = "NAND U-Boot Image";

                           read-only;

                     };

              };

              L2switch@2,0 {

                     #address-cells = <0x1>;

                     #size-cells = <0x1>;

                     compatible = "vitesse-7385";

                     reg = <0x2 0x0 0x20000>;

              };

       };

.

The following kernel configuration have been enabled.

CONFIG_MTD_NAND_FSL_IFC

CONFIG_MTD_NAND

CONFIG_MTD_NAND_ECC

CONFIG_MTD_NAND_FSL_ELBC

With this changes, the NAND partition is not being probed and listed under ‘/proc/mtd’. But the NOR partitions (as provided in DTS) is visible. What would be other settings required to enable the NAND partition and use it as extended storage?

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abineshselvaraj
Contributor III

Is this registers (BRn) are updated (with BR_VALID and NAND FCM selection) by P1020 ELBC during power-on ?. Do we need to explicitly configure this registers?. If it needs to be explicitly configured, is it possible to do it in Linux NAND driver?

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scottwood
NXP Employee
NXP Employee

You need to have the bootloader set up the BRn/ORn registers.  Linux has no way of knowing what the proper values are for your board.

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abineshselvaraj
Contributor III

Hi Scott Wood,

We have configured the bootloader to add NAND support in the following U-boot files,

P1020_SKU.h:

/** ARICENT ****/

#define CONFIG_SYS_NAND_BASE            0xd0000000

#define CONFIG_SYS_NAND_BASE_PHYS      CONFIG_SYS_NAND_BASE

#define CONFIG_SYS_NAND_BASE_LIST      {CONFIG_SYS_NAND_BASE}

#define CONFIG_SYS_MAX_NAND_DEVICE      1

#define NAND_MAX_CHIPS                  1

#define CONFIG_MTD_NAND_VERIFY_WRITE

#define CONFIG_CMD_NAND                1

#define CONFIG_NAND_FSL_ELBC            1

#define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)

/* NAND flash config */

#define CONFIG_NAND_BR_PRELIM  (CONFIG_SYS_NAND_BASE_PHYS \

                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \

                                | BR_PS_8      /* Port Size = 8 bit */ \

                                | BR_MS_FCM            /* MSEL = FCM */ \

                                | BR_V)                /* valid */

#define CONFIG_NAND_OR_PRELIM  (0xFFF80000            /* length 32K */ \

                                | OR_FCM_CSCT \

                                | OR_FCM_CST \

                                | OR_FCM_CHT \

                                | OR_FCM_SCY_1 \

                                | OR_FCM_TRLX \

                                | OR_FCM_EHTR)

#define CONFIG_SYS_BR0_PRELIM  CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */

#define CONFIG_SYS_OR0_PRELIM  CONFIG_FLASH_OR_PRELIM  /* NOR Options */

#define CONFIG_SYS_BR1_PRELIM  CONFIG_NAND_BR_PRELIM  /* NAND Base Address */

#define CONFIG_SYS_OR1_PRELIM  CONFIG_NAND_OR_PRELIM  /* NAND Options */

/*** ARICENT ***/

In U-boot, NAND device id is displayed, but during NAND read/write, it shows an error "skipping bad blocks" with read failed.

The p1020wlan_rev_d.dtb has been added with NAND partition structure and booted with Linux 2.6.32. In the boot log, it shows an error message "Fail to get memory region".

Kindly confirm whether the above config in u-boot is fine?

Thanks &  Regards,

S.Abinesh.

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abineshselvaraj
Contributor III

Hi Scott Wood,

Sorry for the delayed response. The NAND device itself is not recognized from the kernel. The probe function (fsl_elbc_nand_probe()) of kernel NAND driver(fsl_elbc_nand.c) is getting called, but it is not returned successfully. It is failed in the if condition check below,

/* find which chip select it is connected to */

  for (bank = 0; bank < MAX_BANKS; bank++)

  if ((in_be32(&lbc->bank[bank].br) & BR_V) &&

     (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM &&

     (in_be32(&lbc->bank[bank].br) &

      in_be32(&lbc->bank[bank].or) & BR_BA)

      == fsl_lbc_addr(res.start))

  break;

  if (bank >= MAX_BANKS) {

  dev_err(dev, "address did not match any chip selects\n");

  return -ENODEV;

  }

Also, the boot-loader is not enabled with NAND Driver support. It is assumed that, the NAND should be recognized from the kernel without any configuration in boot-loader.

Thanks & Regards,

S.Abinesh (On behalf of Sunder Kumaresan).

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lunminliang
NXP Employee
NXP Employee

Hello Sunder Kumaresan,

Can you try to change reg = <0x1 0x0 0x40000>  to be: reg = <0x1 0x0 0x100000>;

Regards

Lunmin

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scottwood
NXP Employee
NXP Employee

Why?  The NAND SRAM is only 8192 bytes.

Is it just the partition that's not being recognized, or the NAND device itself?  Is the bootloader setting up the chipselect registers for NAND to match what you put in the device tree?

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