How can be calculated the MIPS/MHz ratio of the P4080 processor ?

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How can be calculated the MIPS/MHz ratio of the P4080 processor ?

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doner_t
Contributor II

Hello,

How can be calculated the MIPS/MHz ratio of the P4080 processor ?  (@ 1200 or 1500 MHz)

Regards,

Tugay

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ufedor
NXP Employee
NXP Employee

Please note that MIPS/MHz ratio is a constant.

For the e500mc core it is about 2.5 DMIPS/Mhz.

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ufedor
NXP Employee
NXP Employee

Please note that MIPS/MHz ratio is a constant.

For the e500mc core it is about 2.5 DMIPS/Mhz.

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doner_t
Contributor II

Hello,

And now two things are;

  • It is needed to know GFLOP number of P4080 processor. Could you help me ?
  • This point is crtical and unclear; Does e500mc core provide ECC on its L1 cache ?

Best Regards

Tugay

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ufedor
NXP Employee
NXP Employee

1)  the e500mc is capable of:

SP FP = 1 OP/cycle

DP FP = 0.5 OP/cycle

2) ECC is not implemented.

The L1 caches have:

— Instruction cache: 1 parity bit per word of instruction, 1 bit of parity per tag

— Data cache: 1 parity bit per byte of data, 1 bit of parity per tag

Refer to the e500mc Core Reference Manual:

http://cache.nxp.com/files/32bit/doc/ref_manual/E500MCRM.pdf

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doner_t
Contributor II

Hello,

Does P4080 processor support vector floating- point operations ? So , does it use AltiVec technology ?

Best Regards,

Tugay

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ufedor
NXP Employee
NXP Employee

No.

Please refer to the E500MCRM, e500mc Core Reference Manual:

http://cache.nxp.com/files/32bit/doc/ref_manual/E500MCRM.pdf

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