Hi,
when working with DDR3 what are the connection between the clock and the CKE (clock enable)?
could I work with two clock signals and one CKE?
could I work with any CKE for any clock?
pls. advise.
Zeev Gerber
Please refer to the AN3940 - Hardware and Layout Design Considerations for DDR3 SDRAM, Table 1. DDR3 designer checklist: