The nominal value of MVref is 1.5V. 1%, +/- 7.5mV is the tolerance value for MVref (ripple range).
RDRVR is the "Driver" resistance. It is the resistance at the driver side. Half strength is ~40 ohms and full strength is ~20 ohms.
The MDIC resistors connected to MDIC [0:1] signals used for either full or half drive strength calibration do not draw much current. So you can use 1/16W rated resistors for either half or full drive calibration.
Hi,
We are trying to configure DDR3 on our platform from u-boot.
We tried to disable auto calibration at the moment.
After setting D_INIT bit in DDR_DDR_SDRAM_CFG_2, the bit is never cleared to 0.
None if the bit in DDR_ERR_DETECT is set so we do not know what is the actual problem.
Is there any clue?
Below are the u-boot log which indicates more about CPU version. I am not sure about which erratum we need to enable as well.
-----------------
UBoot 2013.01QorIQ-SDK-V1.5 (May 20 2014 - 11:25:39)
CPU0: P3041, Version: 1.1, (0x82110311)
Core: E500MC, Version: 2.2, (0x80230022)
Clock Configuration:
CPU0:1200 MHz, CPU1:1200 MHz, CPU2:1200 MHz, CPU3:1200 MHz,
CCB:900 MHz,
DDR:650 MHz (1300 MT/s data rate) (Asynchronous), LBC:112.500 MHz
FMAN1: 450 MHz
QMAN: 450 MHz
PME: 450 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Reset Configuration Word (RCW):
00000000: 125a0000 00000000 18180000 00000000
00000010: d8404a3f ffc02000 58000000 01000000
00000020: 00200000 00000000 00000000 ccd80ef7
00000030: a0000000 00000000 00000000 00000000
Board: P3041 Custom board
I2C: ready
DRAM: Initializing....using fixed parameters
Configuring DDR for 1300 MT/s data rate
Workaround for ERRATUM_DDR_A003
total 2 GB
Need to wait up to 40 * 10ms
Waiting for D_INIT timeout. Memory may not work.
2 GiB (DDR3, 64-bit, CL=11, ECC off)
---------------
Hi t-alex,
I just got my new board and I have the same error "waiting for D_INIT timeout" with P2041. Do you have a solution for it if you can share? Thx