unregonized opcode stwcx (on e200z4, powerpc-eabivle-gcc)

[chetandev_ksd]

I am using power-eabivle-gcc 4.9.2. I am writing a assembly code which uses instruction:

stwcx

but, I am getting assembler error:  Error: unrecognized opcode: `stwcx'

target board: MPC5748G (for e200z4, core0)

complier flag :

CFLAGS = -O0 -g3 -Wall -c -fmessage-length=0 -ffunction-sections -fdata-sections -mcpu=e200z4 \

-specs=ewl_c9x.specs -mbig -mvle -mregnames -mhard-float --sysroot="C:/NXP/S32DS_Power_v2017.R1/S32DS/e200_ewl2"

sample invocation:

test:

    $(BIN)/$(CC) $(CFLAGS)  $(ROOT)/skibios/src/arch/mpc57x8/mutex.S -o $(BUILD)/mutex.o

any reason why assembler not able to recognize this instruction? As per e200z4 documentation this instruction is supported.

[lukaszadrapa]

Hi,

notice that it is "stwcx.", not just "stwcx". I tested inline asm command like:

asm("stwcx. %r4,0,%r3");

... and it is working on my side.

And also notice that reservation logic is not implemented between cores on MPC57xx devices. It can be used only on single core for different tasks. It's necessary to use semaphores between the cores.

https://community.nxp.com/thread/437523#comment-856994 

Regards,

Lukas