read access issue about sja1105qel

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read access issue about sja1105qel

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2,390 次查看
SungBong
Contributor II

Hi. 

Our system uses SJA1105QEL ethernet switch (Host is MPC5748G).

I want to read configuration value. so i tried to access address 0x00000000 (ETH_DYN 0x00h) but the result of read access is same as write access (SDO is mirrored as SDI).

According to the software manual, i understand that first 32 bits are access control value and next 32 bits are ignored value for reading data.

So, i tested following method in S32 project.

 

 -test code

image.png

 
 
 
 

-result 

image.png

Do you think this method is wrong or other problem exists?

please any help for me.

 

best regards.

thank you.

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2,341 次查看
guoweisun
NXP TechSupport
NXP TechSupport

guoweisun_0-1602487293154.png

Refer to this timing format!

 

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2,362 次查看
guoweisun
NXP TechSupport
NXP TechSupport

Suggest to write this register firstly then read it to verify the content.

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SungBong
Contributor II

Dear guoweisun.

i already wrote static configuration data such as below before read access.

image.png

image.png

 

do i need anything else?

 

best regards.

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guoweisun
NXP TechSupport
NXP TechSupport

You can read your written content now?

 

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SungBong
Contributor II

where write access, the data is transmitted via SDO. 

i can read buffer after write access.

buffer has mirroring data from SDO same as SDI.

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guoweisun
NXP TechSupport
NXP TechSupport

guoweisun_0-1602487293154.png

Refer to this timing format!

 

2,328 次查看
guoweisun
NXP TechSupport
NXP TechSupport

Yes,please follow the timing !

 

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SungBong
Contributor II

I solved this issue.

i think it was SS signal problem.

i should have checked Continous SS option in S32DS.

thank you for your help a lot.

best regards.

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SungBong
Contributor II

you mean i need to insert delay time between first 32 bits and second 32 bits for t3?

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guoweisun
NXP TechSupport
NXP TechSupport

Data (containing the number of 32-bit quadlets to be read and address to read from) is
received on the SDI input of the switch and is treated as a sequence of 32-bit quadlets.
Data corresponding to the address received is output on SDO pin of the switch.

2,370 次查看
SungBong
Contributor II

Dear guoweisun.

thank you for your reply.

In my case, i want to read a register value at 0x00. 

Where read access, i understand first 32 bits are mirrored same data via SDO.

I expect to read next not mirrored 32 bits data via SDO. but the next 32 bits are also mirrored SDI data. 

i think it is something wrong.

is my test code wrong or not?

 

best regards.

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