Hi all,
I (would like to) use a FPGA as an I2C master (1.5V). My I2C bus consists in several devices with differents voltages (2.5V and 5V).
So I need voltage translation: I think I'll use NVT2001.
What is the best solution?
-> B1/B2 is connected to several I2C devices running at 5V
-> B3/B4 is connected to several I2C devices running at 2.5V
-> pull-up on B1/B2/B3/B4 sides
-> no pull-up on A1/A2/A3/A4 sides
FPGA (1.5V) <-----> NVT2001 label 1 <-----> I2C devices at 2.5V (in parallel)
|
|--> NVT2001 label 2 <-----> I2C devices at 5V (in parallel)
Many thanks for your anwer,
Arnaud.
Thanks...
In my understandings, the blocks labeleld 'SW' in the datasheet (for example in Figure 7) represent in fact FETs. So, when CPU I/O ouputs a zero, B1 is connected to A1 and B3 is connected to A3 (ie A1) (this is not really the case, but the FET turns on). Sink current is consequently the sum of (5/RB1) + (3.3/RB3).
So, my hope to half the resistors to obtain the same amount of current!
Thanks for your reply.
One more questions please: what about the sizing of the resistors?
Because I understand that when CPU I/O (of figure 7) will be low, sink current will be the sum of both current passing through RB1 and RB3. So, "(5/RB1) + (3.3/RB3) nearly equal to driver sink current"?
Or, in other words, is it OK if we consider half the sink current to size both resistors (one half passing through RB1 and second half passing through RB3)?
Thanks,
Arnaud.