What is the maximum slew rate for PCF8523 battery switch over?

[nikolarobottesl]

Background

https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf 

According to the datasheet (page 53) the maximum slew rate is 0.7 V/ms between 2.5V (typical Vthreshold switch battery) and 1.8V (power management operating limit). Also according to the datasheet the VDD is 'monitored' every 1 ms.

So the datasheet's maximum slew rate for a typical Vth(sw)bat:

(2.5V-1.8V)/1ms = 0.7 V/ms

However if the Vth(sw)bat is the minimum value (2.1V), see the static characteristics table on page 50:

(2.1V-1.8V)/1ms = 0.3 V/ms

Question

Am I misunderstanding something or is the maximum slew rate actually 0.3 V/ms to cover the full range of part tolerances? Also the slew rate would be measured between 2.1 and 1.8V.

Assumption

I don't know how your VDD 'monitor' works. I am assuming it works like a sample and hold ADC so you are sampling for a period much shorter than 1ms eg 50us every 1ms.

#pcf8523‌

TomasVaverka - it looks like you answered other questions related to this part

[david_diaz]

Hello Milo,

I hope all is great with you.

The functionality of the battery switch-over is limited by the fact that the power supply VDD is monitored every 1 ms in order to save power consumption.

Your assumption is correct, in this case, the battery switch-over works properly in all cases where VDD falls with a rate lower than 0.7 V/ms.

A series resistor and a capacitor at VDD assure the proper functionality of the battery switch-over even with very fast VDD slope (review figure 37).

I hope this information helps.

Regards,

David

[nikolarobottesl]

Hi David,

Did you read my question carefully? I am concerned that 0.7V/ms is not slow enough if Vth(sw)bat is <2.5V. Can you confirm then that Vth(sw)bat is always equal to or above 2.5V because the datasheet says otherwise in the static characteristics table on page 50. Perhaps the manufacturing tolerances have tightened since this table was generated.

Thanks,

Milo

[darioarias]

Hi Milo,

The range for Vth(sw)bat is 2.1V < Vth(sw)bat < 2.7V but since the typical value is 2.5 V you can safely assume that 0.7V/ms slope will be slow enough, because it's not too fast even if Vth(sw)bat is equal to 2.1V. As the datasheet says "the battery switch-over works properly in all cases where VDD falls with a rate lower than 0.7 V/ms"

Also, it has to do with the current consumption on pin Vdd, when is a few µA, a capacitor of 100 nF on pin VDD is enough to allow a slow power-down, if it is a few hundreds of µA this capacitor must be slightly bigger to force the slope lower than 0.7V/ms, higher that some mA it is recommended to add an RC circuit on the Vdd pin.

Darío