SPT3.1 OPRAM about pdma command bank

[Shi_test]

pdma command direct control SE (banks 8-11) and NE (banks12–15).

↑↑↑↑↑↑↑↑↑↑↑↑↑S32R45 Reference Manual ——Table 629.↑↑↑↑↑↑↑↑↑↑↑

So if i have a pdma command in SCS0 or MCS,the SE and NE all will get pdma data.

Do I understand it correctly?

[GaryRK]

Hi Shi_test,

The PDMA module/accelerator is directly connected to SE and NE OPRAM controllers, meaning that it has lowest-latency access to the OPRAM banks managed by these controllers. However the PDMA can still access (read/write) the other OPRAM banks via the SW and NW controllers but such an access must be forwarded to those controllers meaning it has higher latency.

Best regards,

Gary