SPDIF on DSP56725

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Nikko
Contributor III

Good day,

I was wondering if anyone had specifications relative to the amount of jitter in the recovered clock of the SPDIF module that comes with the DSP56725. I've been searching through the datasheet and couldn't find anything.

Also, what kind of input/output are these SPDIF pins? For example, for the input, I would put a 100nF decoupling capacitor in series followed by a 75 ohms resistor to ground, then straight to the RCA connector. Does that seem ok?

Thanks!

Nick

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Nikko
Contributor III

So here's what i heard from the support.

1. There's no jitter specification available

2. SPDIF pins are indeed TTL. That requires the SPDIF to TTL level converter on the input, and a voltage divider on the output.

3. There's actually an example implementing the SPDIF. See the DSPAUDIOEVM schematics (mother board for most of it,  and daughter card DSP56720 for the SPDIF to TTL level shifter).

 

Cheers

 

Nick

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rocco
Senior Contributor II

Hi Nick,

 

I just looked for information on recovered-clock jitter, and found nothing at all. Sorry, I can't help you there. A service request might be in order.

 

But I do have a concern about your proposed hardware interface. The S/PDIF signal is typically only half a volt, peak-to-peak, and the DSP will want a close to a full 3 volt swing. Also, the input pin has approximately 90k ohm internal pull-down resistor, so an AC couple through a capacitor will swing symmetrically around ground. So I think you will need both amplification and level-shifting to satisfy the 725.

 

In these kind of situations, I usually refer to the EVM schematic for the chip, but the EVM uses a separate S/PDIF receiver, so that doesn't help. I would file a service request, but I find that they typically just refer me to the EVM schematic. I have yet to use the S/PDIF on my DSP56721 project.

 

Sorry I can't be of more help.

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Nikko
Contributor III

Hi Rocco,

 

Thanks very much for your input.

 

I lodge a request now and will post here their reply.

 

Cheers!

 

Nick

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Nikko
Contributor III

So here's what i heard from the support.

1. There's no jitter specification available

2. SPDIF pins are indeed TTL. That requires the SPDIF to TTL level converter on the input, and a voltage divider on the output.

3. There's actually an example implementing the SPDIF. See the DSPAUDIOEVM schematics (mother board for most of it,  and daughter card DSP56720 for the SPDIF to TTL level shifter).

 

Cheers

 

Nick

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AndrejBarbis
Contributor I

Hello all,

i have the same question, but i want to connect SPDIF_in to iMX53 procesor. There is not any description what kind of input is on procesor, so i suppose that we need to convert tipical SPDIF signal through SPDIF/TLL conversion circuit.

Thanks

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