Not receiving Response on SO line of MC33771b

[Jenish_]

Hello dear NXP community,

I am currently working on a developing BMS with MC33771b as BCC chip and using STM32 as controller to get the data from the BCC chip over SPI. Currently I have configure STM32 as SPI master and send commands to configure and receive data. 

After configuring the BCC as per Datasheet, I am able to configure and control the GPIOs by manipulating GPIO_CFG1 and GPIO_CFG2 registers of the BCC. Whenever writing to any register I can also see echo of that message on the SO line. But when I try reading the status of the GPIOs of the BCC through GPIO_STS register I am not getting any response. Also similar is the case for reading the INIT register and SILICON_REV of the BCC chip. Upon probing the SO line what I get is only the 8-bit CRC the rest is 0 or in some cases nothing at all.

I also have attached a scope snapshot. In which first 5 clock chunks (yellow) is for the command that I am sending to read the register. The later 5 is the STM32 driving the SCLK line to be able to receive the data from the BCC, but all is there is 0. Unfortunately I don't have the snapshot of the SO line when it is just sending the CRC. 

Also, I have set up the SPI with 3.3V Interface in mind. 

Appreciate all the help possible. 


Thanks alot.

Regards,
Jenish

[mohamed-moustafa]

Could you tell me the SPI of STM configurations specially CSB or NSS pin?
where I send a command but have no response monitored by logic analyzer "I use stm32 uC".
Need your guidance to just operate it and read data.
Second question, could I give the board an external DC power on VPWR and GND without batteries or must add the batteries.

[Jenish_]

Hello Mohamed,

Regarding the DC power on VPWR pin and GND, I agree with Jozef. Minimum number of cells must be connected depending on which BCC you are using. 

As for the configuration of the SPI on STM32, I am using full-duplex Master with Hardware NSS disable. CSB of NXP I  am controlling by GPIO of the STM. Since NXP responds to or reacts to 40bit message on SPI. I have configured STM to transact 8bit data at a time and repeat process 5 times, resulting 40 bit message transaction. Of course, the 40 bit message should be according to the NXP BCC datasheet. One thing might help you is to check the Clock Parameters of the STM. 

I hope this would be of your help.

Jenish

[JozefKozon]

Hello Mohamed,

Could you tell me the SPI of STM configurations specially CSB or NSS pin?
where I send a command but have no response monitored by logic analyzer "I use stm32 uC".
Need your guidance to just operate it and read data.

[A] Unfortunately we do not support other, then NXP components. Even if we want to support you for other, than NXP components, we wouldn't be able, since we don't know them and we do not have access to other, than NXP components documents, schematics etc. For the STM MCU configuration, please contact the STM support. Or please consider using our MCU with the MC33771B. Recommended MCU would be S32K144.

Second question, could I give the board an external DC power on VPWR and GND without batteries or must add the batteries.

[A] No, only the DC power on the VPWR and GND wouldn't work. You need to use minimally 7 Cells with the MC33771B, or a cell emulator.

But if you use less, than 14 Cells with the MC33771B, you need to follow an AN12536 connection. This application note is confidential and you need to have a valid NDA (Non Disclosure Agreement) with NXP to be able to download it. 

https://www.nxp.com/products/power-management/battery-management/battery-cell-controllers/14-channel...

Please consider purchasing our FRDM33771BSPIEVB and a 14-Cell battery emulator. The boards were tested and if something doesn't work, you can be sure, that issue is not in the hardware or in connection, but in the software.

With Best Regards,

Jozef

[JozefKozon · Accepted solution]

Hello Jenish,

please make sure, that the bit [23] is set low for reading. 

- low = uC Request

- high = MC33771 Read Response

The MC33771 will only react to a read request, if bit [23] is low.

With Best Regards,

Jozef

[Jenish_]

Hi Jozef,

Thank you very much for your quick response. 
In the screenshot in the original thread was the response of the "write command", which was read on MISO line. So the 23rd bit was set high by the NXP.

Although your reply helped me to look further into detail about the response timing. Thus helping me to further refine the Reading process of the NXP. As of now I am able to get the MISO to talk. 

Thanks alot for your support.

Jenish

[JozefKozon]

Hi Jenish,

great. I am glad, that you have successfully established the communication.

With Best Regards,

Jozef