Internal voltage regulator of CLRC663

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Internal voltage regulator of CLRC663

396 次查看
Danz1
Contributor III

Hi,

What is voltage tolerance (1.8V +/- ??) of the voltage regulators, DVDD and AVDD, in CLRC663 NFC chip? Thanks.

 

Rgds

 

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378 次查看
Danz1
Contributor III

Hi Kelly,

 

Thanks for your reply. 

I have no further question.

Rgds

Danz

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383 次查看
KellyLi
NXP TechSupport
NXP TechSupport

Hello @Danz1 

Thanks for contacting us and interested in the NXP products.
These two pins are used to connect buffer capacitors and are both output power supply buffer. And both should be connected to blocking capacitors. That's to say, when the voltage changes (instantaneous change), such as a voltage drop, the capacitor discharges to compensate for the loss, otherwise, the capacitor absorbs part of the change to achieve a buffering effect. The electric energy is absorbed through the energy storage function of the capacitor to achieve the purpose of stabilizing the voltage and waveform. Therefore, based on the above functions, the output voltage of the two pins should be stable at 1.8V, even if there is little fluctuation. The specific fluctuation or tolerance value is not stated in the data sheet and application documentation, and it should be that the fluctuation is so small that it can be ignored or has no effect on the design.


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