HI,
was having some doubts regarding LS1043A.
1. In the datasheet it clearly detailed about the power on sequencing of LS1043A. Nothing is given in the datasheet regarding the power down sequencing. what should be the power down procedure for LS1043A. which all rails should be powered down in what sequence..?
2. We have chosen MC34VR500V4ES as the PMIC for power on sequencing LS1043A as per the NXP reference designs. the power down sequencing of this PMIC is disabling all rails at the same time. Will this be appropriate to such a processor to shut down without a proper sequence..? Will this PMIC power down affect the processor performance and lifetime..?
2. Regarding the case of USB ID pin of LS1043A, the power for LS1043A USB power section is provided to USB_HVDD(3.3 V) and USB_SVDD, USB_SDD (1.0 V). In the datasheet USB_ID is to be provided as a 1.8 V signal. being an input, we previously provided a 3.3 V to this pin. Should we change this to 1.8 V..?
Earliest reply is appreciated.
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Thanks & Regards,
Akshay V
