/*
* Based on default linker command file for PPC EABI
* ROM/SRAM (L2) target
* TEXT copied from ROM to RAM, section .text
*/
// **NOTES:
// - ROM Image address setting in linker preference panel must
// match the address of the rom memory segment (below).
MEMORY {
// *** Check project linker settings for stack location when adjusting RAM
ram : org = 0x00002000, len= 0x7E000 // SRAM: Firmware use, 512KB @ 0x0
// *** When changing rom origin, also change EPPC Linker->ROM image for debug session
rom : org = 0xfff80000, len= 0x7f000 // application start ROM address
rom_4k : org = 0xfffff000, len= 0x1000 // initialzation/reset section
}
FORCEACTIVE { gInterruptVectorTable, __reset }
SECTIONS {
.app_flash : {
*(.intvec)
*(.rdata)
*(.rodata)
*(.ctors)
*(.dtors)
*(extab)
*(extabindex)
} > rom
GROUP : {
.text (TEXT): {}
.data : {}
.sdata : {}
.sbss : {}
.sdata2 : {}
.sbss2 : {}
.bss : {}
.PPC.EMB.sdata0 : {}
.PPC.EMB.sbss0 : {}
} > ram
GROUP : {
.= 0xFFFFF000;
.init LOAD(0xFFFFF000): {}
.= 0xFFFFFFFC;
.reset LOAD(0xFFFFFFFC) : {}
} > rom_4k
// The dummy section is just a placeholder. The linker automatically
// generates an address for it in the ROM image, which tells us
// where the end of the ROM image is.
.dummy : {}
// 4 MB FLASH, 2 MB x 16
___FLASH_START = 0xFFC00000;
___FLASH_SIZE = (4 * 1024 * 1024);
// Application flash
___APP_START = ADDR(.app_flash);
___APP_SIZE = SIZEOF(.app_flash);
}
/*
* Based on default linker command file for PPC EABI
* ROM/SRAM (L2) target
* TEXT copied from ROM to RAM, section .text
*/
// **NOTES:
// - ROM Image address setting in linker preference panel must
// match the address of the rom memory segment (below).
MEMORY {
// *** Check project linker settings for stack location when adjusting RAM
ram : org = 0x00002000, len= 0x7E000 // SRAM: Firmware use, 512KB @ 0x0
// *** When changing rom origin, also change EPPC Linker->ROM image for debug session
rom : org = 0xfff80000, len= 0x7f000 // application start ROM address
rom_4k : org = 0xfffff000, len= 0x1000 // initialzation/reset section
}
FORCEACTIVE { gInterruptVectorTable, __reset }
SECTIONS {
.app_flash : {
*(.intvec)
*(.rdata)
*(.rodata)
*(.ctors)
*(.dtors)
*(extab)
*(extabindex)
} > rom
GROUP : {
.text (TEXT): {}
.data : {}
.sdata : {}
.sbss : {}
.sdata2 : {}
.sbss2 : {}
.bss : {}
.PPC.EMB.sdata0 : {}
.PPC.EMB.sbss0 : {}
} > ram
GROUP : {
.= 0xFFFFF000;
.init LOAD(0xFFFFF000): {}
.= 0xFFFFFFFC;
.reset LOAD(0xFFFFFFFC) : {}
} > rom_4k
// The dummy section is just a placeholder. The linker automatically
// generates an address for it in the ROM image, which tells us
// where the end of the ROM image is.
.dummy : {}
// 4 MB FLASH, 2 MB x 16
___FLASH_START = 0xFFC00000;
___FLASH_SIZE = (4 * 1024 * 1024);
// Application flash
___APP_START = ADDR(.app_flash);
___APP_SIZE = SIZEOF(.app_flash);
}