Hello. I want to know about the start of receiving FeliCa on CLRC663. As for the received signal from FeliCa, it is standard to detect the 6-byte preamble (00 00 00 00 00 00) and the 2-byte sync code (B2 4D) and start receiving. I think it is possible to start receiving even if a few bits of the preamble are lost, but how many bits does CLRC663 need at least? I think that the simple logic is only the search of the sync code, and the preamble is unnecessary as data. Is such a setting possible at CLRC663?
