8572 PHY

[HankHill33]

Having some issues with a transceiver looking to troubleshoot and query through PHY. 

Looking through the manual I see that to get PHY status (offset eTSEC1: 0x2_4530  you have to initialize a MII MGMT read cycle. Would running memread eTSEC1:0x2_4524 be enough to to run the 4530 afterwards?

Also any Ethernet port routines to query PHY or any other way to help query the PHY?

Thank you. 

[ran_tang]

Hi Andrew,

Our factory team suggested that, on 8572 you need to use eTSEC1 MDIO controller to communicate with external PHYs.
Hence, the on-chip TBI (PHY) needs to have a unique address so there is no conflict with the address of external PHYs.
TBIPA is the address for the on-chip TBI (PHY).

For CLAUSE 22 access, you have to supply the PHY ADDR and REG ADDR to the memory-mapped 8572 registers (In the 8572ERM, look for MIIMADD).

Also, the attached AN may shed some light as a reference point.

Thanks,

Ran