SL3S40X1 Read Protection

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

SL3S40X1 Read Protection

761 次查看
MCU_0X55
Contributor I

Hello,

I'd like to know what are the SL3S40X1 capabilities for user memory protection. After reading the datasheet, I still have following questions:

- After activation of the read protection, the user memory cannot be read via: RF, I2C or both?

- How could this read protection be disabled?

 

Thanks in advance

0 项奖励
回复
1 回复

726 次查看
Fabian_R
NXP TechSupport
NXP TechSupport

When read protect is enabled the IC will only allow this information to be read when in the “secured” state. However, the I²C interface always has this “secured” privilege. Please check this in section 12 RF interface/I2C interface arbitration.

"I2C access to the chip memory is possible regardless if it is in the EPC Gen2 secured
state or not"

This means that whenever you need to disable the UCODE memory protection you can do this securely by I2C.

Best Regards,
Fabian
0 项奖励
回复