Hi,
when RST_N input is active (low) the PVDD_OUT does not reach 3.3V
Pls see attached observations with scope dumps.
What is preventing the PVDD_OUT startup when RST_N is active ?
Why is the RST_N input pin not listed in the PN7462 family datasheet rev. 4.3, 24 January 2019, chap 8.16.1 table 25 ?
Best Regards
Viggo
Hello,
Please consider that there are some configurations that might be affected during a reset, also, you will need to make sure that there must not be any load current drawn from PVDD_LDO during the soft start of the PVDD_LDO and consider that the PVDD_OUT it's an output of PVDD_LDO for pad voltage supply as it is mentioned in the data sheet of the device.
Hope that helps.
Regards,
Estephania