Execution profiling PMSM Closed Loop Simulink Example on MCSXTE2BK142

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Execution profiling PMSM Closed Loop Simulink Example on MCSXTE2BK142

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472 次查看
DevMotorControl
Contributor I
Currently, I am developing with the MCSXTE2BK142. I am following the example Simulink model from the MBDT toolbox. 

\NXP_MBDToolbox_S32K1xx\S32_Examples\s32k14x\mc\MCSXTE2BK142\PMSM_Demo\PMSM_ClosedLoop

I am wondering how the execution profiling of the fast loop is done using this model. In the freemaster tool I found that a conversion is done for a number of ticks to an execution time in microseconds. However, if I look at the configuration of SPLL I found that instead of a 40Mhz(according to the conversion done in freemaster) based tick counter it is a 20MHz based tick counter. Did I deduce the settings of SPLL wrong or is there an error in the example?

Having a 40MHZ based tick or a 20 MHz based tick counter is a big deal as it would mean that the processor load is a factor 2 higher than what is suggested according to the simulink example. 

I also looked on the forum where the same deduction to a 20MHz clock was made: What-is-the-Tick-duration-while-profiling-code-in-PIL 
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445 次查看
mariuslucianand
NXP Employee
NXP Employee

Hello @DevMotorControl,

Thank you for your post!

The explanations provided in the post you mentioned What is the Tick duration while profiling code in PIL ? are valid and the SPLLDIV2 is indeed 20MHz. But the SPLLDIV2 does not mean that the SPLL is automatically divided by 2, is the second divider that could be applied to the SPLL value.

mariuslucianand_0-1698100475312.png

In our default configuration delivered with MBDT, as explained in the referred article, the SPLLDIV2 is actually the SPLL with a division factor of 4. So the PIL/Profiler timer is actually 20MHz, with a tick taking 50ns. I could confirm this, by using a simple program, which sets a pin high, executes a sequence, and then sets the pin to a low state. If we measure the execution time with an external logic analyzer and we also measure the execution time using the profiler block, we could also confirm that the frequency is 20Mhz. 

mariuslucianand_1-1698100887092.png

In the FreeMASTER examples coming with the Motor Control, I think indeed that the value of the translation factor between ticks and ns needs to be adjusted to be 0.05 and not 0.025 as it is now. This comes from the early development time, when most likely the profiler had a value of 40Mhz but they were adjusted in a previous release.

Hope this helps,

Marius

 

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446 次查看
mariuslucianand
NXP Employee
NXP Employee

Hello @DevMotorControl,

Thank you for your post!

The explanations provided in the post you mentioned What is the Tick duration while profiling code in PIL ? are valid and the SPLLDIV2 is indeed 20MHz. But the SPLLDIV2 does not mean that the SPLL is automatically divided by 2, is the second divider that could be applied to the SPLL value.

mariuslucianand_0-1698100475312.png

In our default configuration delivered with MBDT, as explained in the referred article, the SPLLDIV2 is actually the SPLL with a division factor of 4. So the PIL/Profiler timer is actually 20MHz, with a tick taking 50ns. I could confirm this, by using a simple program, which sets a pin high, executes a sequence, and then sets the pin to a low state. If we measure the execution time with an external logic analyzer and we also measure the execution time using the profiler block, we could also confirm that the frequency is 20Mhz. 

mariuslucianand_1-1698100887092.png

In the FreeMASTER examples coming with the Motor Control, I think indeed that the value of the translation factor between ticks and ns needs to be adjusted to be 0.05 and not 0.025 as it is now. This comes from the early development time, when most likely the profiler had a value of 40Mhz but they were adjusted in a previous release.

Hope this helps,

Marius

 

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429 次查看
DevMotorControl
Contributor I

Hi @mariuslucianand ,

Your post confirms my deductions. Thanks for your reply!

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