Hello!
I have some questions regarding the implementation of the DMA blocks in my system. I implemented a model in which I use DMA to echo back CAN messages that I received in my board.
1. I've not been able to find the correct registers to configure the block for "edma transfer", can I get support on this? I've included the DMA blocks for doing the following procedure:
Receives over CAN -> I put message received in 0x20000000
eDMA copies from 0x20000000 to 0x20000001
I read message copied from 0x20000000 -> I send over CAN again
2. I want to calculate the processor load of the model with a DMA included. Would the calculations I specified here work for a model with DMA? In case it doesn't, is there a way to know how much processor load is using the model in this DMA case? I know the result should be very low, but I want to be certain of the correct implementation of the blocks by observing this parameter.
Thanks.
Kind regards.
