Hi,
I intend to use some channels on eTPU engine 2 on MPC5746. I downloaded the eTPU function sets from NXP website. But all of them use only engine1.
The functions in eTPU_util.c are written such that they can be adapted to run on eTPU engine 1 or engine 2. I tried to use the same examples for eTPU engine 2 by changing the channel numbers on the host side functions and configuring SIUL2 accordingly, but without success.
I have some questions:
1. channel numbers for eTPU engine 2 channels: Should I use numbers from 32 to 63 or 64 to 95?
each eTPU engine has 32 channels, numbered 0 to 31, so I expect eTPUB channel number to start from 32. But per this macro in etpu_util.h,
/***************************************************************************//*!* @brief Channel number expressed by (engine, channel)* @note All channel numbers for both eTPUs are absolute.* eTPU_A has channels 0-31 and eTPU_B has channels 64-95.*******************************************************************************/#define FS_ETPU_ENGINE_CHANNEL(x,y) (((x)-1)*64 + y) eTPUB channel number starts from 64. Why?
2. engine memory size:
In function uint32_t fs_etpu2_init( struct etpu_config_t p_etpu_config, uint32_t engine_mem_size);
A simple example that uses engine 2 would be helpful. Does anyone have one to share?
Thank you.
Hi, usually eTPU engines are called eTPU A and eTPU B, on this device for unknown reason they are called eTPU 1 and eTPU2.
It may be confusing a bit as eTPU, eTPU+ and eTPU2 are shortcuts for eTPU architecture i.e. generation (MPC5746R uses eTPU2). What's exactly the case of fs_etpu2_init function - fs_etpu_init initalizes eTPU module, fs_etpu2_init subsequently initializes specific eTPU2-only setting of an eTPU2 module. It is addendum to fs_etpu_init (that is backward compatible with eTPU).
engine_mem_size is related to engine relative addressing mode
Below screenshot from https://www.nxp.com/docs/en/reference-manual/ETPURMAD.pdf
If the engine_mem_size parameter is 0, then such mode in unused.
To point 3) You can use just one engine, but initialization is common for both engines (A and B)
To point 1) eTPU_A has channels 0-31 and eTPU_B has channels 64-95. To be honest I haven't known it why it is so, but I have found an answer:
"It results from the eTPU memory map. The eTPU A channel registers start at address eTPU_base+0x400, eTPU B channel registers at eTPU_base+0x800. This gives a space for 64 channels to each eTPU engine, although there are only 32 channels implemented. The memory map was designed this way in order to keep a possibility of more channels on future devices"
Hope it helps
Thank you David. That helped.
JoyR